CYW20738
Table 9. GPIO Pin Descriptionsa
Pin Number
Default Di-
rection
Power Do-
main
Pin Name
After POR
Alternate Function Description
40-pin
QFN
64-pin
BGA
21
F6
P0
Input
Floating
VDDO ■ GPIO: P0
■ Keyboard scan input (row): KSI0
■ A/D converter input
■ Peripheral UART: puart_tx
■ SPI_2: MOSI (master and slave)
■ IR_RX
■ 60 Hz_main
■ Not available during TMC=1
22
G6
P1
Input
Floating
VDDO ■ GPIO: P1
■ Keyboard scan input (row): KSI1
■ A/D converter input
■ Peripheral UART: puart_rts
■ SPI_2: MISO (master and slave)
■ IR_TX
24
H8
P2
Input
Floating
VDDO ■ GPIO: P2
■ Keyboard scan input (row): KSI2
■ Quadrature: QDX0
■ Peripheral UART: puart_rx
■ SPI_2: SPI_CS (slave only)
■ SPI_2: SPI_MOSI (master only)
23
25
F8
H7
P3
P4
Input
Input
Floating
Floating
VDDO ■ GPIO: P3
■ Keyboard scan input (row): KSI3
■ Quadrature: QDX1
■ Peripheral UART: puart_cts
■ SPI_2: SPI_CLK (master and slave)
VDDO ■ GPIO: P4
■ Keyboard scan input (row): KSI4
■ Quadrature: QDY0
■ Peripheral UART: puart_rx
■ SPI_2: MOSI (master and slave)
■ IR_TX
Document Number: 002-14891 Rev. *C
Page 19 of 42
CYPRESS [ CYPRESS ]
