CYW20738
2. Pin Assignments
2.1 Pin Descriptions
Table 8. Pin Descriptions
Pin Number
Pin Name
I/O Power Domain
Description
40-pin QFN 64-pin BGA
8
F1
RF
I/O
VDD_RF
RF antenna port
RF Power Supplies
6
D1
E1
H1
H2
VDDIF
I
I
I
I
VDD_RF
VDD_RF
VDD_RF
VDD_RF
IFPLL power supply
RF front-end supply
VCO, LOGEN supply
7
VDDFE
VDDVCO
VDDPLL
9
10
RFPLL and crystal oscillator supply
Power Supplies
13
–
H6
VDDC
I
I
N/A
N/A
Baseband core supply
Ground
D4, E2, E5, VSS
F2, G1, G2
34
16
A6, D7
–
VDDO
VDDM
I
I
VDDO
VDDM
I/O pad and core supply
I/O pad supply
Clock Generator and Crystal Interface
11
H3
XTALI
I
VDD_RF
Crystal oscillator input. See “Crystal Oscillator” on page 13
for options.
12
40
G3
A3
XTALO
O
I
VDD_RF
VDDO
Crystal oscillator output.
XTALI32K
Low-power oscillator (LPO) input is used.
Alternative Function:
■ P11 in 40-QFN only
■ P39 in 64-BGA only
39
B3
XTALO32K
O
VDDO
Low-power oscillator (LPO) output.
Alternative Function:
■ P12 in 40-QFN only
■ P38 in 64-BGA only
Core
20
G8
G7
RESET_N
TMC
I/O PU VDDO
Active-low system reset with open-drain output & internal
pull-up resistor
19
I
VDDO
Test mode control
High: test mode
Connect to GND if not used.
UART
14
H5
G5
UART_RXD
UART_TXD
I
VDDMa
UART serial input – Serial data input for the HCI UART
interface. Leave unconnected if not used.
Alternative function:
■ GPIO3
15
O, PU VDDMa
UART serial output – Serial data output for the HCI UART
interface. Leave unconnected if not used.
Alternative Function:
■ GPIO2
BSC
Document Number: 002-14891 Rev. *C
Page 17 of 42
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