CYW20738
Table 8. Pin Descriptions (Cont.)
Pin Number
Pin Name
I/O Power Domain
Description
40-pin QFN 64-pin BGA
17
F7
SDA
I/O,
PU
VDDMa
Data signal for an external I2C device.
Alternative function:
■ SPI_1: MOSI (master only)
■ GPIO0
■ CTS
18
E8
SCL
I/O,
PU
VDDMa
Clock signal for an external I2C device.
Alternative function:
■ SPI_1: SPI_CLK (master only)
■ GPIO1
■ RTS
LDO Regulator Power Supplies
4
5
B1
C1
LDOIN
I
LDO
LDO
Battery input supply for the LDO
LDO output
LDOOUT
O
a. VDDO for 64-pin package.
Document Number: 002-14891 Rev. *C
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