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AN2131QC 参数 Datasheet PDF下载

AN2131QC图片预览
型号: AN2131QC
PDF下载: 下载PDF文件 查看货源
内容描述: 在EZ - USBTM集成电路 [The EZ-USBTM Integrated Circuit]
分类和应用:
文件页数/大小: 334 页 / 1468 K
品牌: CYPRESS [ CYPRESS ]
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4.9  
Receiving I2C Data  
To read a multiple-byte data record, follow these steps:  
1. Set the START bit.  
2. Write the peripheral address and direction=1 (for read) to I2DAT.  
3. Wait for DONE=1*. If BERR=1 or ACK=0, terminate by setting STOP=1.  
4. Read I2DAT and discard the data. This initiates the first burst of nine SCL pulses  
to clock in the first byte from the slave.  
5. Wait for DONE=1*. If BERR=1, terminate by setting STOP=1.  
6. Read the data from I2DAT. This initiates another read transfer.  
7. Repeat steps 5 and 6 for each byte until ready to read the second-to-last byte.  
8. Before reading the second-to-last I2DAT byte, set LASTRD=1.  
9. Read the data from I2DAT. With LASTRD=1, this initiates the final byte read on  
the I2C bus.  
10. Wait for DONE=1*. If BERR=1, terminate by setting STOP=1.  
11. Set STOP=1.  
12. Read the last byte from I2DAT immediately (the next instruction) after setting the  
STOP bit. This retrieves the last data byte without initiating an extra read transac-  
tion (nine more SCL pulses) on the I2C bus.  
* If the I2C interrupt (8051 INT3) is enabled, each “Wait for DONE=1” step can be inter-  
rupt-driven, and handled by an interrupt service routing. See Section 9.12, "I2C Inter-  
rupt” for more details regarding the I2C interrupt.  
EZ-USB TRM v1.9  
Chapter 4. EZ-USB CPU  
Page 4-11  
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