ACK bit at the same time it sets DONE=1. The ACK bit should be ignored for read trans-
fers on the bus.
4.7.3 BERR
This bit indicates an I2C bus error. BERR=1 indicates that there was bus contention,
which results when an outside device drives the bus LO when it shouldn’t, or when
another bus master wins arbitration, taking control of the bus. BERR is cleared when the
8051 reads or writes the I2DAT register.
4.7.4 ID1, ID0
These bits are set by the boot loader (Section 4.10, "I2C Boot Loader") to indicate whether
an 8-bit address or 16-bit address EEPROM at slave address 000 or 001 was detected at
power-on. They are normally used only for debug purposes. Table 4-3 shows the encod-
ing for these bits.
4.8
Sending I2C Data
To send a multiple byte data record over the I2C bus, follow these steps:
1. Set the START bit.
2. Write the peripheral address and direction=0 (for write) to I2DAT.
3. Wait for DONE=1*. If BERR=1 or ACK=0, go to step 7.
4. Load I2DAT with a data byte.
5. Wait for DONE=1*. If BERR=1 or ACK=0 go to step 7.
6. Repeat steps 4 and 5 for each byte until all bytes have been transferred.
7. Set STOP=1.
* If the I2C interrupt (8051 INT3) is enabled, each “Wait for DONE=1” step can be inter-
rupt driven, and handled by an interrupt service routine. See Section 9.12, "I2C Inter-
rupt” for more details regarding the I2C interrupt.
Page 4-10
Chapter 4. EZ-USB CPU
EZ-USB TRM v1.9
CYPRESS [ CYPRESS ]
