Table C-19. provides a summary of interrupt sources, flags, enables, and priorities.
Table C-18. Interrupt Natural Vectors and Priorities
Natural
Priority
Interrupt
Vector
Interrupt
RESUME
Description
USB Wakeup (resume) interrupt
External interrupt 0
Timer 0 interrupt
0
1
33h
03h
0Bh
13h
1Bh
23h
2Bh
3Bh
43h
4Bh
53h
5Bh
63H
INT0
TF0
2
INT1
External interrupt 1
Timer 1 interrupt
3
TF1
4
TI_0 or RI_0
TF2 or EXF2
TI_1 or RI_1
INT2
Serial port 0 interrupt
Timer 2 interrupt
5
6
Serial port 1 interrupt
USB interrupt
7
8
I2C interrupt
INT3
9
INT4
External interrupt 4
External interrupt 5
External interrupt 6
4
INT5
11
12
INT6
C.4.2 Interrupt Priorities
There are two stages of interrupt priority assignment, interrupt level and natural priority. The
interrupt level (highest, high, or low) takes precedence over natural priority. The USB wakeup
interrupt, if enabled, always has highest priority and is the only interrupt that can have highest
priority. All other interrupts can be assigned either high or low priority.
In addition to an assigned priority level (high or low), each interrupt also has a natural priority,
as listed in Table C-18.. Simultaneous interrupts with the same priority level (for example,
both high) are resolved according to their natural priority. For example, if INT0 and INT2 are
both programmed as high priority, INT0 takes precedence due to its higher natural priority.
Once an interrupt is being serviced, only an interrupt of higher priority level can interrupt the
service routine of the interrupt currently being serviced.
C - 34
Appendix C: 8051 Hardware Description
EZ-USB TRM v1.9
CYPRESS [ CYPRESS ]
