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AM49DL323BGB85IS 参数 Datasheet PDF下载

AM49DL323BGB85IS图片预览
型号: AM49DL323BGB85IS
PDF下载: 下载PDF文件 查看货源
内容描述: [Memory Circuit, Flash+PSRAM, CMOS, PBGA73,]
分类和应用: 静态存储器内存集成电路
文件页数/大小: 64 页 / 1054 K
品牌: CYPRESS [ CYPRESS ]
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P R E L I M I N A R Y  
FLASH ERASE AND PROGRAMMING PERFORMANCE  
Parameter  
Typ (Note 1) Max (Note 2)  
Unit  
sec  
sec  
µs  
Comments  
Sector Erase Time  
0.4  
28  
5
5
Excludes 00h programming  
prior to erasure (Note 4)  
Chip Erase Time  
Byte Program Time  
Accelerated Byte/Word Program Time  
Word Program Time  
150  
120  
210  
63  
4
µs  
Excludes system level  
overhead (Note 5)  
7
µs  
Byte Mode  
Word Mode  
21  
14  
Chip Program Time  
(Note 3)  
sec  
42  
Notes:  
1. Typical program and erase times assume the following conditions: 25°C, 3.0 V VCC, 1,000,000 cycles. Additionally,  
programming typicals assume checkerboard pattern.  
2. Under worst case conditions of 90°C, VCC = 2.7 V, 1,000,000 cycles.  
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes  
program faster than the maximum program times listed.  
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.  
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table  
12 for further information on command definitions.  
6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.  
LATCHUP CHARACTERISTICS  
Description  
Min  
Max  
Input voltage with respect to VSS on all pins except I/O pins  
(including A9, OE#, and RESET#)  
1.0 V  
12.5 V  
Input voltage with respect to VSS on all I/O pins  
1.0 V  
VCC + 1.0 V  
+100 mA  
V
CC Current  
100 mA  
Note: Includes all pins except VCC. Test conditions: VCC = 3.0 V, one pin at a time.  
PACKAGE PIN CAPACITANCE  
Parameter  
Symbol  
Parameter Description  
Input Capacitance  
Test Setup  
VIN = 0  
Typ  
11  
Max  
14  
Unit  
pF  
CIN  
COUT  
CIN2  
Output Capacitance  
VOUT = 0  
VIN = 0  
12  
14  
17  
16  
pF  
Control Pin Capacitance  
WP#/ACC Pin Capacitance  
16  
pF  
CIN3  
VIN = 0  
20  
pF  
Notes:  
1. Sampled, not 100% tested.  
2. Test conditions TA = 25°C, f = 1.0 MHz.  
FLASH DATA RETENTION  
Parameter Description  
Test Conditions  
150°C  
Min  
10  
Unit  
Years  
Years  
Minimum Pattern Data Retention Time  
125°C  
20  
July 19, 2002  
Am49DL32xBG  
59  
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