RS8953B/8953SPB
3.0 Circuit Descriptions
HDSL Channel Unit
3.5 HDSL Channel
3.5.2.2 HDSL Receive
Framer
The HDSL receive framer acquires and maintains synchronization of the HDSL
channel and generates pointers that control overhead extraction in the STUFF,
CRC and HOH demux circuitry. The MPU initializes the framer to the Out Of
Sync state by writing any data value to SYNC_RST [addr 0x63]. From the Out Of
Sync state, the framer advances to Sync Acquired when a correct SYNC word is
detected. The framer searches all bits received on RDATn to locate a match with
one or both of the SYNC word patterns, SYNC_WORD_A [addr 0xCB] or
SYNC_WORD_B [addr 0xCC], according to the selection made by
FRAMER_EN [RCMD_1; addr 0x60].
For T1 applications, the framer is programmed to search for two different sync
word values because separate sync words are transmitted on each HDSL channel
to specify the wire pair number. During E1 applications, ETSI requires a common
sync word be used for all pairs and Z-bits used to define the wire pair number,
although the framer may still be programmed to search for two different sync
words in non-standard E1 applications. Due to the possibility of tip/ring
connector reversal on each wire pair, all sign bits received on RDATn might be
inverted. Therefore, the receive framer searches for both the programmed sync
word value and the sign-inverted sync word value. Consequently a maximum of
four values of the sync word are used in finding the frame location. If the sync
word detected is a sign inverted version of one of the configured sync words, the
framer sets the Tip/Ring Inversion (TR_INVERT) status bit [STATUS_1; addr
0x05] and automatically inverts the sign of all quats received on RDATn.
N8953BDSB
Conexant
3-29
CONEXANT [ CONEXANT SYSTEMS, INC ]
