RS8953B/8953SPB
3.0 Circuit Descriptions
HDSL Channel Unit
3.5 HDSL Channel
3.5.1.3 CRC Calculation
The Cyclic Redundancy Check (CRC) calculation is performed on all transmit
data, and the HOH multiplexer inserts the resulting 6-bit CRC into the subsequent
output frame. CRC is calculated over all bits in the (N)th frame except the SYNC,
STUFF, and CRC bits, and then is inserted into the (N+1)th frame. The MPU can
choose to inject CRC errors on a per frame-basis by setting ICRC_ERR
[TCMD_1; addr 0x07]. The six CRC bits are calculated as follows:
1. All bits of the (N)th frame, except the 14 SYNC, 6 CRC, and any STUFF
bits are used to calculate CRC. A total of 4,682 bits are used, in order of
occurrence, to construct a polynomial in X, such that bit 0 of the (N)th
4681
frame is the coefficient of the term X
is the coefficient of the term X .
and bit 4681 of the (N)th frame
0
6
2. The polynomial is multiplied by the factor X and the result is divided,
6
modulo 2, by the generator polynomial X +X+1. Coefficients of the
remainder polynomial are used, in order of occurrence, as an ordered set of
check bits, CRC1–CRC6, for the (N+1)th frame. Ordering is such that the
5
coefficient of term X in the remainder polynomial is check bit CRC1, and
0
the coefficient of term X is check bit CRC6.
3. Check bits CRC1–CRC6 contained in a frame are associated with the
contents of the preceding frame. When there is no immediately preceding
frame, check bits may be assigned any value.
3.5.1.4 Scrambler
The scrambler operates at the BCLKn bit rate on all HDSL transmit data, except
for the 14-bit SYNC words and the four STUFF bits. The MPU enables the
scrambler by setting SCR_EN [TCMD_1; addr 0x06] and selects the scrambler
algorithm in SCR_TAP [TCMD_2; addr 0x07]. Two scrambler algorithms are
implemented for HTU-R or HTU-C data transmission:
•
•
In the HTU-R to HTU-C direction, the polynomial shall be
–23
–18
X
X
1, where is equal to modulo 2 summation.
In the HTU-C to HTU-R direction, the polynomial shall be
–23
–5
X
X
1, where is equal to modulo 2 summation.
3.5.1.5 STUFF
Generator
Transmit bit stuffing synchronizes the HDSL channel’s transmit 6 ms frame
period to the PCM channel’s 6 ms sync by adding 0 or 4 STUFF bits to the HDSL
output frame. The STUFF generator decides whether 0 or 4 STUFF bits are
inserted and reports the result of each decision in TX_STUFF [STATUS_3; addr
0x07]. When 4 STUFF bits are inserted, sign/magnitude values are taken from
TSTUFF [addr 0xE4]. Stuffing decisions are based on comparison of the phase
difference measured between PCM and HDSL 6 ms frame intervals in relation to
the programmed STUFF thresholds [STF_THRESH_B; addr 0xD1] and
threshold [STF_THRESH_C; addr 0xD3]. If the measured phase difference is
equal to or less than threshold B, then no STUFF bits are inserted for that output
frame. If the measured phase difference exceeds threshold B and is less than or
equal to threshold C, then 4 STUFF bits are inserted. When the measured phase
exceeds threshold C, the STUFF generator reports a transmit Stuffing Error,
STUFF_ERR [STATUS_3; addr 0x07] and automatically resets the transmit FIFO
by performing the TFIFO_RST [addr 0x0D] command.
N8953BDSB
Conexant
3-25
CONEXANT [ CONEXANT SYSTEMS, INC ]
