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RS8953BEPJ 参数 Datasheet PDF下载

RS8953BEPJ图片预览
型号: RS8953BEPJ
PDF下载: 下载PDF文件 查看货源
内容描述: 高比特率数字用户线( HDSL )信道单元 [High-Bit-Rate Digital Subscriber Line (HDSL) channel unit]
分类和应用: 电信集成电路
文件页数/大小: 173 页 / 1229 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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RS8953B/8953SPB  
3.0 Circuit Descriptions  
HDSL Channel Unit  
3.5 HDSL Channel  
In T1 framing mode [E1_MODE = 0 in CMD_1; addr 0xE5], Z-bit positions  
are replaced by F-bits and are treated as payload with respect to the PCM channel.  
Figure 3-16 shows a standard application 2T1 frame format in which each  
payload block contains 1 F-bit, plus 12 payload bytes. The figure also illustrates  
F-bits routed as payload to both HDSL channels and demonstrates the order in  
which PCM timeslots are routed to payload bytes: bytes 1 through 12 correspond  
to PCM timeslots 1–12 routed on CH1, bytes 13 through 24 correspond to PCM  
timeslots 13–24 routed on CH2. CH3 is unused in 2T1 application.  
Standard application 2E1 and 3E1 frame formats are shown in Figure 3-17  
and Figure 3-18, respectively. Standard mapping of PCM data places alternating  
bytes in each HDSL channel, as shown by byte numbering. The 2E1 payload  
block contains 18 payload bytes, and the 3E1 payload block contains 12 bytes. In  
E1 framing mode [E1_MODE = 1 in CMD_1; addr 0xE5], 48 Z-bits are treated as  
overhead and are under MPU control. (Refer to Table 3-5 for Z-bit definitions).  
Table 3-3 shows additional examples of frame mapping options.  
Figure 3-16. 2T1 Frame Format  
2T1 FRAME  
2351 OR 2353 QUATS  
7Q  
1Q  
12 X 48.5 = 582Q 5Q  
582Q  
5Q  
582Q  
5Q  
582Q  
0,2Q  
S
Q
1
S
Q
2
H
O
H
B
0
1
B
0
2
B
1
2
H
O
H
B
1
3
B
1
4
B
2
4
H
O
H
B
2
5
B
2
6
B
3
6
H
O
H
B
3
7
B
3
8
B
4
8
S
Q
1
S
Q
2
SYNC  
WORD  
SYNC  
WORD  
“6-”  
“6+”  
1/392 MS  
F
BYTE1  
8-BITS  
BYTE2  
BYTE3  
BYTE12  
BYTE24  
0 MS  
CH1  
CH2  
6 MS  
LEGEND:  
1B  
F
BNN = PAYLOAD BLOCKS 1-48  
HOH = HDSL OVERHEAD  
SQN = STUFF QUAT  
BYTE13  
BYTE14  
BYTE15  
BNN  
97/784 MS  
N8953BDSB  
Conexant  
3-21  
 
 
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