CX82100 Home Network Processor Data Sheet
Table 2-3. CX82100 HNP Pin Signal Definitions (Continued)
Pin Signal
Pin No.
I/O
I/O Type
Signal Name/Description
Host Parallel Expansion Bus Interface
HAD[15:0]
N7, M9, L8, K9, I/O
J9, N10, P10,
Itpu/Ot4
It/Ot4
Data Lines 15-00.
Typically, connect to Flash ROM D[15:0], respectively.
M10, L9, K10,
L10, M11, J10,
L11, N12, P12
HAD[29:16]
L3, L1, M2, M1,
O
Address Lines 20-7.
Typically, connect to Flash ROM A[20:10], respectively.
N2, N1, M3,
N3, P3, M4,
N4, P4, L4, M5
HC[07:01]
L5, M6, K6, N6,
O
O
It/Ot4
It/Ot4
Address Lines 6-0.
Typically, connect to Flash ROM A[6:0], respectively.
P6, L6, P7
HC08 (HRD#)
M13
M12
Read Enable. Active low read enable asserted when data is
transferred from the selected device onto the data bus.
Typically, connect through 51 Ω as HRD# to Flash ROM OE# and
through 51 Ω as HRDUA# to UART OE#.
HC09 (HWR#)
O
O
It/Ot4
It/Ot4
Write Enable. Active low write enable asserted when data is
transferred from the data bus into the selected device.
Typically, connect through 51 Ω as HWR# to Flash ROM WR# and
through 51 Ω as HWRUA# to UART WR#.
HC00 (HCS0#)/
GPIO32
P14 (CX82100
-11/-12/-51/-51)
Flash ROM Chip Enable. Active low output enables optional Flash
ROM when asserted.
P13 (CX82100
Connect to Flash ROM CE#.
Application Dependent.
Application Dependent.
-41/-42)
HC10 (HRDY#)
P14 (CX82100
-41/-42)
J8
I
Itpd/Ot4
It/Ot4
HAD31
O
(HCS4#)/
GPIO37
Serial EEPROM Interface
I2C_DATA
(GPIO15)
E2
E3
I/O
O
Itpu/Ot4
Serial EEPROM Data. I2C_DATA is a bidirectional data line used
to transfer data into and out of the EEPROM. Connect to the
EEPROM SDA pin and to +3.3V through 4.7K Ω.
Serial EEPROM Shift Clock. The I2C_CLOCK output is used to
clock all data into and out of the EEPROM. Connect to the
EEPROM SCL pin and to +3.3V through 4.7K Ω.
I2C_CLOCK
(GPIO16)
Itpu/Ot4
101306C
Conexant Proprietary and Confidential Information
2-13