CX82100 Home Network Processor Data Sheet
9.3.2
GPIO Output Enable Register 1 for GPIO[15:14; 8:5] (GPIO_OE1: 0x003500B4)
GPIO_OE1 is the output enable register for GPIO[15:14; 8:5].
Bit(s)
Type
RW
Default
16’b0
Name
GPIO_OE{X},
15≥X≥0,
Description
GPIO[X] Output Enable, 15≥X≥0.
0 = GPIO[X] is an input pin.
1 = GPIO[X] is an output pin.
15:0;
15≥Y≥0,
Y = Bit #
X = Y
Bit(s)
31:16
15
14
13:9
8
7
6
5
4:0
Type
Default
Name
Description
Reserved.
RW
RW
1’b0
1’b0
GPIO_OE15
GPIO_OE14
GPIO15 Output Enable.
GPIO14 Output Enable.
Reserved.
GPIO8 Output Enable.
GPIO7 Output Enable.
GPIO6 Output Enable.
GPIO5 Output Enable.
Reserved.
RW
RW
RW
RW
1’b0
1’b0
1’b0
1’b0
GPIO_OE8
GPIO_OE7
GPIO_OE6
GPIO_OE5
9.3.3
GPIO Output Enable Register 2 for GPIO[31; 27:16] (GPIO_OE2: 0x003500B8)
GPIO_OE2 is the output enable register for GPIO[31; 27:16]
Bit(s)
15:0;
15≥Y≥0,
Y = Bit #
Type
RW
Default
16’b0
Name
GPIO_OE{X},
31≥X≥16,
Description
GPIO[X] Output Enable, 31≥X≥16.
0 = GPIO[X] is an input pin.
1 = GPIO[X] is an output pin.
X = Y + 16
Bit(s)
31:16
Type
Default
Name
Description
Reserved.
15
14:12
11
10
9
8
7
RW
1’b0
GPIO_OE31
GPIO31 Output Enable.
Reserved.
GPIO27 Output Enable.
GPIO26 Output Enable.
GPIO25 Output Enable.
GPIO24 Output Enable.
Reserved.
RW
RW
RW
RW
1’b0
1’b0
1’b0
1’b0
GPIO_OE27
GPIO_OE26
GPIO_OE25
GPIO_OE24
6
5
4
3
2
1
0
RW
RW
RW
RW
RW
RW
RW
1’b0
1’b0
1’b0
1’b0
1’b0
1
GPIO_OE22
GPIO_OE21
GPIO_OE20
GPIO_OE19
GPIO_OE18
GPIO_OE17
GPIO_OE16
GPIO22 Output Enable.
GPIO21 Output Enable.
GPIO20 Output Enable.
GPIO19 Output Enable.
GPIO18 Output Enable.
GPIO17 Output Enable.
GPIO16 Output Enable.
1’b0
9-4
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