CX82100 Home Network Processor Data Sheet
8.9
USB DMA Control Registers
8.9.1
EP0_IN Transmit Increment Register (EP0_IN_TX_INC: 0x00330048)
Bit(s)
7:0
Type
RW
Default
8'b0
Name
EP0_IN_TX _INC
Description
Transmit Increment Register for EP0_IN.
No. of new valid packets in the EP0_IN host buffer ready to be
transferred by the DMAC. Updated by firmware.
8.9.2
EP0_IN Transmit Pending Register (EP0_IN_TX_PEND: 0x0033004C)
Bit(s)
7:0
Type
RO
Default
8'b0
Name
EP0_IN_TX _PEND
Description
Transmit Pending Register for EP0_IN.
No. of existing pending packets in the EP0_IN host buffer ready to
be transferred by host.
8.9.3
EP0_IN Transmit qword Count Register (EP0_IN_TX_QWCNT: 0x00330050)
Bit(s)
3:0
Type
RO
Default
4'b0
Name
EP0_IN_TX _QWCNT
Description
Transmit qword Count Register for EP0_IN.
Used by hardware.
8.9.4
EP1_IN Transmit Increment Register (EP1_IN_TX_INC: 0x00330054)
Bit(s)
7:0
Type
RW
Default
8'b0
Name
EP1_IN_TX _INC
Description
Transmit Increment Register for EP1_IN.
No. of new valid packets in the EP1_IN host buffer ready to be
transferred by the DMAC. Updated by firmware.
8-30
Conexant Proprietary and Confidential Information
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