CX28394/28395/28398
4.0 Electrical/Mechanical Specifications
Quad/x16/Octal—T1/E1/J1 Framers
4.5 MPU Interface Timing
Figure 4-8. Intel Asynchronous Write Cycle
MOTO* = 1, SYNCMD = 0
1
9
ALE
2
A[8]
AD[7:0]
WR*
Address
3
6
Address
Write Data
7
5
RD*
4
8
CS*
Table 4-11. Intel Asynchronous Write Cycle
Symbol
Parameter
ALE high pulse width
Minimum
Maximum
Units
1
2
3
4
5
6
7
8
9
15
2
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
A[8], AD[7:0] Address setup to ALE low
A[8], AD[7:0] Address hold after ALE low
CS*, RD* setup to WR* low
5
0
WR* pulse width low
20
2
AD[7:0] input data setup to WR* or CS* high
AD[7:0] input data hold after WR* or CS* high
RD* hold after WR* or CS* high
10
0
End write cycle to next ALE high
55
100054E
Conexant
4-11
CONEXANT [ CONEXANT SYSTEMS, INC ]
