3.0 Registers
CX28394/28395/28398
3.8 Serial Interface Registers
Quad/x16/Octal—T1/E1/J1 Framers
3.8 Serial Interface Registers
These registers are not used on the CX28395 device.
022—Serial Control (SER_CTL)
Writing to SER_CTL initiates a serial interface read or write operation. During a write operation, a 16-bit word,
consisting of SER_CTL and SER_DAT, is transmitted to the LIU. During a read operation, SER_CTL is
transmitted and 8-bit data from the LIU is received and placed in SER_DAT register. SER_RW is transmitted
first and SER_DAT[0] is transmitted or received first.
7
6
5
4
3
2
1
0
SER_A[6]
SER_A[5]
SER_A[4]
SER_A[3]
SER_A[2]
SER_A[1]
SER_A[0]
SER_RW
SER_RW
Serial Read/Write – Selects the current serial interface operation type.
0 = Write
1 = Read
SER_A[6:0]
Serial Interface Register Address – Identifies the LIU register address for the current read or
write operation.
023—Serial Data (SER_DAT)
7
6
5
4
3
2
1
0
SER_DAT[7]
SER_DAT[6]
SER_DAT[5]
SER_DAT[4]
SER_DAT[3]
SER_DAT[2]
SER_DAT[1]
SER_DAT[0]
SER_DAT[7:0]
Serial Interface Data
024—Serial Status (SER_STAT)
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
SER_DONE
SER_DONE
Serial Interface Done–During a read or write serial interface operation, SER_DONE is cleared
indicating that an operation is in progress. After the operation is complete, this bit is set and an
interrupt request is generated if enabled by SER_IER [addr 025]. SER_DONE is also cleared
if read by the MPU. When the SER_DONE is cleared, the interrupt request is deactivated to
allow the INTR* pin to also be deactivated if all other interrupt sources have been serviced.
3-36
Conexant
100054E
CONEXANT [ CONEXANT SYSTEMS, INC ]
