1.0 Functional Description
CX25870/871
1.3 Device Description
Flicker-Free Video Encoder with Ultrascale Technology
The analog Y, PB, and PR - Video[0-3] outputs can be routed out of any of the
four on-chip DACs by adjusting the appropriate OUT_MUXA/B/C/D[1:0] bits.
All of the OUT_MUX bits are contained in register 0xCE.
Because the CX25870 device has four DACs and only three are needed for
Component Video, the designer can choose to use the 4th output, usually from
DAC_D, for any purpose deemed necessary. This output can be configured to
either the PR, Y, PB, or Y_DELAY output via OUT_MUXD. If the output is not
going to be used whatsoever, Conexant recommends DAC_D be disabled by
setting DACDISD (bit 3, Register BA). This will save on power dissipation.
The Component Video output signals expect a 75 Ω load to ground from the
display medium. Correct Y, PR, PB amplitudes will be generated only when each
CX25870 output sees an equivalent impedance of 37.5 Ω between the source and
destination.
The CX25870 is compliant with the major standards and technical reports
governing the Standard Definition TV Analog Component Video interface. The
name of these standards are as follows:
•
•
•
EIA 770.2-A–Standard Definition TV Analog Component Video Interface
EIA 770.1–Standard Definition TV Analog Component Video Interface
ANSI/SMPTE Standard 170M (1994) (M/NTSC) for
Television–Composite Analog Video Signal–NTSC for Studio
Applications
To obtain any of these specifications, visit Global Engineering Documents at:
http://global.ihs.com/
Conexant recommends that any designer utilizing the CX25870 with a
Component Video output utilize the same DAC low-pass filters used for standard
definition TV outputs listed in Figure 3-2 of this data sheet.
1-84
Conexant
100381B
CONEXANT [ CONEXANT SYSTEMS, INC ]
