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CX11656-11 参数 Datasheet PDF下载

CX11656-11图片预览
型号: CX11656-11
PDF下载: 下载PDF文件 查看货源
内容描述: 家庭网络与集成的模拟前端电路数据表物理层设备(初步) [Home Networking Physical Layer Device with Integrated Analog Front End Circuitry Data Sheet (Preliminary)]
分类和应用:
文件页数/大小: 50 页 / 473 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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CX11656 HomePlug 1.0 PHY Data Sheet  
3.1.3.3  
3.1.3.4  
OP (Operation Code)  
READ is indicated by “10”. WRITE is indicated by “01”.  
PHYAD (PHY Address)  
The PHY Address is 5 bits, allowing up the 32 unique PHY addresses. The CX11656 will  
respond to PHY addresses indicated by 0bXX000. The “XX” bits of the PHY address are  
controlled by the CX11656 interface pins MDI_ADRSEL(0:1). This allows the designer  
to assign the CX11656 to one of 4 unique PHY addresses.  
3.1.3.5  
3.1.3.6  
REGAD (Register Address)  
The Register Address is 5 bits and is used to index the maximum of 32 individual  
registers in the MDI address space. The CX11656 only implements the two mandated  
MII registers. 0b00000 will index the MII Control Register and 0b00001 will index the  
MII Status Register.  
TA (Turnaround)  
The turnaround time is a 2-bit time spacing between the Register Address field and the  
Data field to avoid contention during a read transaction.  
For reads, both the external host and the CX11656 remain three-stated for the first bit  
time. The CX11656 will drive a “0” during the second bit time.  
For writes, the external host drives a “1” for the first bit time and a “0” bit for the second  
bit time.  
3.1.3.7  
Data  
The data field is 16 bits. The first data bit transmitted and received is bit 15 of the register  
being addressed.  
102069A  
Conexant Proprietary and Confidential Information  
3-11  
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