CX11656 HomePlug 1.0 PHY Data Sheet
3.1.1
MII Interface
MII is an industry standard, multi-vendor, interoperable interface between separate MAC
and PHY devices. It provides a simple interconnection between the CX11656 and
IEEE802.3 Ethernet MAC controllers (commonly referred to as external host controllers
in this document) available from a variety of IC suppliers. The MII consists of separate 4-
bit data paths for transmit and receive data along with carrier sense and collision
detection. Data is transferred between the MAC and PHY over each 4-bit data path
synchronous with a clock signal supplied to the host by the CX11656. The MII interface
also provides a 2-wire bidirectional serial management data interface (MDI). This
interface provides access to the status and control registers in the CX11656.
3.1.1.1
MII Timing Diagram
The transmission behavior of the MII interface is illustrated in Figure 3-3.
The receive behavior of the MII interface is illustrated in Figure 3-4.
An unsuccessful attempt to transmit a packet, resulting in a collision, is illustrated in
Figure 3-5.
The MII receive timing is illustrated in Figure 3-6.
The MII transmit timing is illustrated in Figure 3-7.
The MII DC characteristics are listed in Table 3-1.
Note: MII_CRS is asynchronous to MII_TXCLK.
Figure 3-3. MII TX Waveform
MII_TXCLK
MII_CRS
MII_TXEN
DATA
DATA
DATA
DATA
MII_TXD[3:1], MII_TX0
MII_COL
102069_007
102069A
Conexant Proprietary and Confidential Information
3-3
CONEXANT [ CONEXANT SYSTEMS, INC ]
