2.0 Circuit Description
2.6 Clock Rate Adapter
Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
Step 4
Configure RSCALE, VSCALE, VSEL, and XSEL from Table 2-9 which contains
configuration examples. Again, in some cases, two or more configurations are
possible for each frequency option. Many other RSCALE and VSCALE values
are also applicable. RSCALE is a programmable frequency divider which scales
the CLADI clock frequency before it is applied to the CLAD phase detector,
CPHASE. Similarly, VSCALE scales the CLAD internal feedback clock,
CLADV. These two clocks must have the same frequency at the phase detector’s
input for the CLAD loop to properly lock. The rule is
(CLADI Reference freq) ÷ (RSCALE factor) = (CLADV freq) ÷ (VSCALE factor).
Table 2-9. Common CLADI Reference Frequencies and CLAD Configuration Examples (1 of 2)
Phase
CLADI
Compare
Frequency
(kHz)
CLADV
(kHz)
Reference
(kHz)
RSCALE
VSCALE
T1/E1
VSEL
XSEL
8
0
0
0
0
0
0
0
0
0
7
0
0
7
1
0
7
2
0
7
0
2
2
2
8
16
7
6
5
4
3
2
1
0
0
7
0
0
7
1
0
7
2
0
8
0
2
2
2
1024
1024
1024
1024
1024
1024
1024
1024
2048
2048
2048
4096
4096
4096
8192
8192
8192
16384
1024
16384
1536
1544
1544
X
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
0
0
1
1
7
2
2
7
3
3
7
8
0
7
6
5
7
X
X
X
X
X
X
X
X
X
X
0
16
32
32
64
64
128
256
512
1024
2048
128
256
512
1024
2048
16
2048
4096
32
4096
8192
X
X
0
X
X
1
2048
8192
64
X
X
0
X
X
2
2048
16384
128
16384
384
386
386
16384
X
X
0
X
X
3
1536
1544
X
X
1
X
X
0
2-44
Conexant
N8370DSE