Table 3-29. Receive LIU Registers (2 of 2)
Bit Number
ADDR
(hex)
Register
Label
Read
Write
7
6
5
4
3
2
1
0
027
028
DSLICE
EQ_OUT
VGA
R/W
R/W
R
DSLICE[7]
EQOUT[7]
—
DSLICE[6]
EQOUT[6]
—
DSLICE[5]
EQOUT[5]
VGA[5]
DSLICE[4]
EQOUT[4]
VGA[4]
DSLICE[3]
EQOUT[3]
VGA[3]
DSLICE[2]
EQOUT[2]
VGA[2]
DSLICE[1]
EQOUT[1]
VGA[1]
DSLICE[0]
EQOUT[0]
VGA[0]
029
02A
PRE_EQ
COEFF
GAIN
R/W
R
FORCE
COEFF[7]
—
ON
VTHRESH[5]
COEFF[5]
—
VTHRESH[4]
COEFF[4]
GAIN[4]
VTHRESH[3]
COEFF[3]
GAIN[3]
VTHRESH[2]
COEFF[2]
GAIN[2]
VTHRESH[1]
COEFF[1]
GAIN[1]
VTHRESH[0]
COEFF[0]
GAIN[0]
030–037
038–03C
COEFF[6]
—
R/W
Table 3-30. Receiver Registers
Bit Number
ADDR
(hex)
Register
Label
Read
Write
7
6
5
4
3
2
1
0
040
041
042
043
044
045
046
047
048
049
RCR0
RPATT
RLB
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
RAMI
—
RABORT
—
RFORCE
RESEED
—
RLOFD
BSTART
—
RLOFC
FRAMED
DN_LEN[1]
LBA[5]
RLOFB
ZLIMIT
RLOFA
RPATT[1]
UP_LEN[1]
LBA[7]
LBD[7]
0
RZCS
RPATT[0]
UP_LEN[0]
—
—
—
DN_LEN[0]
LBA[6]
LBA
LBA[1]
LBD[1]
—
LBA[2]
LBD[2]
—
LBA[3]
LBD[3]
FS_NFAS
—
LBA[4]
LBD[4]
EXZ_LCV
—
LBD
LBD[5]
LBD[6]
—
RALM
LATCH
ALM1
ALM2
ALM3
YEL_INTEG
STOP_CNT
RALOS
RLOF_INTEG
LATCH_CNT
RLOS
RPCM_AIS
LATCH_ALM
SIGFRZ
—
—
—
LATCH_ERR
RLOF
RMYEL
LOOPDN
—
RYEL
LOOPUP
RMAIS
—
RAIS
R
—
TSHORT
SRED
TLOC
—
TLOF
3
8
R
SEF
MRED
FRED
LOF[1]
LOF[0]
CONEXANT [ CONEXANT SYSTEMS, INC ]
