GMSK Modem Data Pump
Page 22 of 37
MX909A PRELIMINARY INFORMATION
4.5 CRC, FEC, Interleaving and Scrambling Information
4.5.1 CRC
This is a 16-bit CRC code used in the Mobitex¥ Data Block. In transmit it is calculated by the modem from
the 18 data bytes using the following generator polynomial:
16
12
5
g(x) = x + x + x + 1
i.e.
CRC - CCITT X.25.
This code detects all (single) error bursts of up to 16 bits in length and about 99.998% of all other error
patterns.
The CRC register is initialized to all '1s' and the CRC is calculated octet by octet starting with the least
significant bit of 'byte 0'. The CRC calculated is bit-wise inverted and appended to the data bytes with the
most significant bit transmitted earliest.
In receive mode, a 16-bit CRC code is generated from the 18 data bytes of each Mobitex¥ Data Block as
above and the bit-wise inverted value is compared with the received CRC bytes. If a mismatch is present,
then an error has been detected.
4.5.2 FEC
In transmit mode, during T7H and TDB, the modem generates a 4-bit Forward Error Correction code for each
coded byte. The FEC is defined by the following H matrix:
7_______0
11101100
H = 11010011
10111010
3___0
1000
0100
0010
0001
01110101
Generation of the FEC consists of logically ANDing the byte to be transmitted with bits 7 to 0 of each row of
the H matrix. Even parity is generated for each of the 4 results and these 4 parity bits, in the positions
indicated by the last 4 columns of the H matrix, form the FEC code.
In checking the FEC, the received 12-bit word is logically ANDed with each row of the H matrix (earliest bit
received compared with the first column). Again even parity is generated for the 4 resulting words and these
parity bits form a 4-bit nibble. If this nibble is all zero then no errors have been detected. Other results 'point'
to the bit in error or indicate that uncorrectable errors have occurred.
This code can correct any single error that has occurred in each 12-bit (8 data + 4 FEC) section of the
message.
Example:
If the byte to be coded is '00101100' then the FEC is derived as follows:
H matrix row:
1
2
3
4
A
B
11101100
00101100
00101100
1
11010011
00101100
00000000
0
10111010
00101100
00101000
0
01110101
00101100
00100100
0
A AND B
Even Parity:
Where A is bits 7 - 0 of one row of the H matrix and B is the byte to be coded. The even parity bits apply to
the result of 'A AND B'.
So the word formed will be: '00101100 1000' sent left to right
When the same process is carried out on these 12 bits as above, using all 12 bits of each H matrix row, the
resulting 4 parity bits will be '0000'.
¤2001 MX-COM, Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480134.005
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