VSR CODEC with DRAM CONTROL
12
MX812 PRELIMINARY INFORMATION
Characteristics
See Note
Min.
Typ.
Max.
Unit
Dynamic Values
“Xtal” Pin Input Frequency Range
Store Mode
12
4.0
4.1
MHz
Analog Input Signal Levels
Analog Input Signal Frequency Range
Recommended Signal Source Impedance
Play Mode
9
9, 10
9
-24.0
300
–
–
–
4.0
3400
2.0
dB
Hz
kΩ
Analog Output Signal Levels
Output Noise (idle)
13
11
-7.0
–
–
-5.0
–
dB
-55.0
dBp
Overall ‘Store to Play’ Performance
Output Noise (Input Short Circuit)
SINAD (SR = 32kb/s)
11
11
–
–
-50.0
23.0
–
–
dBp
dB
(Input = 1.0kHz @ -6.0dB)
Notes
1. Not including DRAM current.
2. D input from DRAM
3. Outputs to DRAM.
4. All digital inputs.
5. Serial Clock, Command Data and Chip Select inputs.
6. Reply Data output.
7. Reply Data and Interrupt (IRQ) outputs.
8. Leakage current into the “Off” Interrupt (IRQ) output.
9. For optimum performance.
10. Input filtering must be performed at the source.
11. Measured in conjunction with the FX836 R2000 system Audio Processor.
12. For full C-BUS compatibility.
13. Playback of a stored “-6.0dB 1.0kHz Test Signal.”
© 1997 MX•COM Inc.
www.mxcom.com Tele: 800 638-5577 910 744-5050 Fax: 910 744-5054
Doc. # 20480076.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
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CMLMICRO [ CML MICROCIRCUITS ]
