Pin Number
Function
FX029
DW/J
D5
1
1
Serial Clock: This external clock input is used to “clock in” the control data. See Figure 4 for
timing information. This input has an internal 1MΩ pullup resistor.
2
3
4
5
Serial Data: Operation of the two amplifier stages (1 and 2) is controlled by the data entered
serially at this pin. The data is entered (bit 13 to bit 0) on the rising edge of the external Serial
Clock. The data format is described in Tables 1-3 and Figure 4.
This input has an internal 1MΩ pullup resistor.
Load/Latch: Governs the loading and execution of the serial control data. During serial data
loading this input should be kept at a logical “1” to ensure that data rippling past the latches
has no effect. When all 14 bits have been loaded this input should be strobed “1” to “0” to “1” to
latch the new data in. Data is executed on the rising edge of this strobe.
4
5
6
IN 1A (Stage 1 Input 1): Analogue Input.
7
IN 1B (Stage 1 Input 2): Analogue Input.
6
8
IN 2A (Stage 2 Input 1): Analogue Input.
7
9
IN 2B (Stage 2 Input 2): Analogue Input.
8
12
13
16
17
18
20
21
VSS: Negative supply rail (GND).
9
VBIAS: The output of the on-chip bias circuitry, held at VDD/2.
IN 1C (Stage 1 Input 3): Analogue Input. Normally used for FSK data.
OUT 2 (Stage 2 Output): Analogue Output.
OUT 1B (Stage 1 Output 2): Analogue Output.
OUT 1A (Stage 1 Output 1): Analogue Output.
10
11
12
13
14
OUT 3 (Uncommitted Amplifier Output): Output from the general purpose uncommitted
amplifier.
15
16
23
24
IN 3 (Uncommitted Amplifier Input): Inverting input to general purpose uncommitted amplifier.
VDD: Positive supply rail. A single +5-volt power supply is required.
2
CMLMICRO [ CML MICROCIRCUITS ]
