Digital PMR Radio Processor
bits: >24 20 16 348
CMX7131/CMX7141
Table 6 NXDN Frame Format – Data Communication
UDCH1 or FACCH2
P
SW LI
Table 7 NXDN Frame Format – Data Burst Operation
bits: >24 20 16 252
SW LI
96
CAC
G
P
P = Preamble (optional)
SW = Synchronisation Word
FS1 = 18 bits Preamble + 20 bits SW
FS2 = 20 bits SW
LI = LICH (Link Information Channel)
SACCH = Slow Associated Control Channel
FACCH1 = Fast Associated Control Channel 1 (144 bits)
FACCH2 = Fast Associated Control Channel 2 (348bits)
TCHx = Traffic/Payload Data (72 bits)
UDCH1 = User Data Channel 1 (348 bits)
CAC = User Data Channel 2 (252 bits)
G = Guard time (96 bits)
In Tx and Rx mode, the Preamble and Synchronisation Word are handled automatically and do not need
to be loaded by the host.
It is possible to substitute FACCH1 blocks for TCH blocks during a call (frame stealing), in which case the
vocoder should either be fed a silence frame or repeat its last data.
2014 CML Microsystems Plc
Page 27
D/7141_FI-3.x/6
CMLMICRO [ CML MICROCIRCUITS ]
