Digital PMR Radio Processor
CMX7131/CMX7141
2
Block Diagram
DISC
Tx and Rx Interfacing
V
BIAS
MOD1
Tx
Mode
Select
MOD2
V
BIAS
ALT
MUX
MUX
MIC
Tx Modulator
V
BIAS
AUDIO
Rx Signal Routing
Audio O/P
Core Operations
4FSK Modem
Demodulator
Filtering
Filtering
4FSK Modem
Modulator
AFSD
Soft-decision
Decoding
Rx Data
Buffer
Tx Data
Buffer
Air Interface Protocol
Air Interface Protocol
Rx Functions
Tx Functions
Auxiliary Functions
SYSCLK1
SYSCLK2
System Clock 1
System Clock 2
Function Image™
Configured IO
TXENA
RXENA
GPIOA
GPIOB
System Clocks
Internal Signal
Aux
ADC1
MUX
Aux
ADC 2
Thresholds
Averaging
Thresholds
GPIO
RF1N
RF1P
RF Synthesiser 1
Averaging
CP1OUT
ISET1
RF2N
RF2P
RF Synthesiser 2
CP2OUT
ADC1
ADC2
ADC3
ADC4
Multiplexed ADCs
DAC1
DAC2
DAC3
DAC4
AuxDAC1
AuxDAC2
AuxDAC3
AuxDAC4
Ramp Profile RAM
ISET2
RFVDD
CPVDD
RF Synthesisers
DACs
(CMX7131 only)
RFVSS
RFCLK
EPSI
EPSCLK
EPSO
EPSCSN
Bias
SSOUT
Bias
SPI
EEPROM
Interface
Boot
Control
System Control
Main PLL
Crystal
Oscillator
Registers
Power
Control
C-BUS
Interface
IRQN
RDATA
CSN
CDATA
SCLK
VBIAS
AVSS
DVSS
BOOTEN1
BOOTEN2
AVDD
DVDD
VDEC
Figure 1 CMX7141 Block Diagram
2014 CML Microsystems Plc
Page 7
XTAL/CLK
XTALN
D/7141_FI-3.x/6
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