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CMX7131Q1 参数 Datasheet PDF下载

CMX7131Q1图片预览
型号: CMX7131Q1
PDF下载: 下载PDF文件 查看货源
内容描述: [Microprocessor, 4MHz, CMOS, VQFN-64]
分类和应用: 时钟外围集成电路
文件页数/大小: 74 页 / 4034 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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Digital PMR Radio Processor  
CMX7131/CMX7141  
CMX7131 CMX7141  
Pin  
Name  
Type  
64-pin  
Q1/L9  
48-pin  
Q3/L4  
Description  
SPI bus Chip Select/Frame Sync  
53  
52  
44  
45  
SSOUT  
DVSS  
OP  
PWR Digital ground  
C-BUS Serial Clock: The C-BUS serial clock input from the  
µC  
46  
47  
48  
SCLK  
SYSCLK2  
CSN  
IP  
OP  
IP  
54  
55  
56  
Synthesised Digital System Clock Output 2  
C-BUS Chip Select: The C-BUS chip select input from the µC  
- there is no internal pullup on this input  
57  
58  
59  
60  
61  
-
-
NC  
OP  
OP  
Reserved do not connect this pin  
1
2
3
4
EPSI  
Serial Memory Interface: Output: SPI bus Output  
Serial Memory Interface: Clock; SPI bus Clock  
EPSCLK  
EPSO  
IP+PD Serial Memory Interface: Input; SPI bus Input  
EPSCSN  
OP  
Serial Memory Interface: Chip Select  
Used in conjunction with BOOTEN2 to determine the  
operation of the bootstrap program.  
62  
5
BOOTEN1  
IP+PD  
Used in conjunction with BOOTEN1 to determine the  
operation of the bootstrap program.  
63  
64  
6
7
BOOTEN2  
DVSS  
IP+PD  
PWR Digital ground  
On this device, the central metal pad (which is exposed on  
Q1 and Q3 packages only) may be electrically unconnected  
or, alternatively, may be connected to analogue ground  
EXPOSED  
EXPOSED  
SUBSTRATE  
~
METAL PAD METAL PAD  
(AV ).  
SS  
No other electrical connection is permitted.  
Notes: IP  
OP  
=
=
=
=
=
=
Input (+ PU/PD = internal pullup/pulldown resistor)  
Output  
Bidirectional  
3-state output  
Power connection  
No Connection - should NOT be connected to any signal.  
BI  
TS OP  
PWR  
NC  
3.1 Signal Definitions  
Table 1 Definition of Power Supply and Reference Voltages  
Signal  
Name  
Pins  
Usage  
Power supply for analogue circuits  
Power supply for digital circuits  
Power supply for core logic, derived from DV by on-chip regulator  
AV  
DV  
AVDD  
DVDD  
VDEC  
VBIAS  
AVSS  
DD  
DD  
V
V
DEC  
BIAS  
DD  
Internal analogue reference level, derived from AV  
Ground for all analogue circuits  
Ground for all digital circuits  
DD  
AV  
DV  
SS  
SS  
DVSS  
RFV  
RFV  
CPV  
RFVDD  
RFVSS  
CPVDD  
Power supply for RF circuits  
Ground for RF circuits  
Power supply for charge pump circuits  
DD  
SS  
DD  
2014 CML Microsystems Plc  
Page 10  
D/7141_FI-3.x/6