Digital PMR Radio Processor
CMX7131/CMX7141
6.6.2 Addressing
The NXDN standard allows individual or group addressing systems to be implemented using the 6-bit
“RAN” field in the SACCH block. The host can load six RAN codes into Program Block 1 as “Own-RANs”
and the CMX7131/CMX7141 will only accept an incoming call if one of these is matched or if the “All-Call”
RAN (all-zeros) is received. If the “Open Rx” bit is set in the Modem Control register ($C7), all decoded
over-air is delivered to the host over the C-BUS. The CMX7131/CMX7141 can also be programmed to
accept or reject calls depending on the value of the SACCH “Message Classification” field, using the
Manufacturer ID in Program Block 1.
6.6.3 Rx Mode
In Rx mode ($C1, Modem Control = $0011), the CMX7131/CMX7141 automatically starts searching for
frame synchronisation. When a valid framesync sequence is detected, an “FS1 Detect” or “FS2 Detect”
IRQ is asserted and the data demodulator is enabled. The CMX7131/CMX7141 then processes the first
frame to extract control channel data and decide whether to accept the call. The CMX7131/CMX7141
performs all the necessary data de-scrambling, de-interleaving and FEC decoding functions for control
channel and payload data blocks. If the LICH or SACCH control channel blocks in the first frame fail their
CRC or parity-bit checks, the CMX7131/CMX7141 will continue scanning incoming frames until valid
control channel information is received.
The SACCH/FACCH1 “RAN” in the “SU” field is then checked and accepted if either:
(a) it is the all-zeros “All-Call” RAN, or
(b) it matches one of the device’s “RAN” programmed by the host into Program Block P1.0 to P1.5.
If this check fails, and the “Open Rx” bit is clear, the call is rejected and the CMX7131/CMX7141 restarts
framesync search automatically without host intervention.
Otherwise, the call is accepted, a “Called” IRQ is issued to the host and the User Code and ID match-type
(exact match or All-Call) are reported in the RxAuxData register ($CC), and the CMX7131/CMX7141 then
begins transferring data blocks to the host.
Control channel fields and payload data blocks are transferred via the RxData registers. The Block ID field
in the RxData0 register informs the host what type of data block each transfer contains. The host MUST
respond to each “DataReady” IRQ before the RxData registers are overwritten by subsequent data blocks.
If “soft” data mode has been selected, uncoded payload data is transferred in 4-bit log-likelihood-ratio
(LLR) format and in this mode the host must be able to service the “DataReady” IRQs and RxData
registers at four times the normal rate to avoid loss of data.
When a CRC or parity-bit failure has been detected in a control channel or payload data block, an
additional “Event” IRQ is issued to the host at the same time as the “DataReady” IRQ, with a
corresponding error code in the Modem Status register, $C9.
Received frames are processed continually until an “End” frame is detected, the Call Drop Threshold is
exceeded (P0.0) or the Mode is changed back to IDLE. The CMX7131/CMX7141 will then automatically
disable the SPI-CODEC (if enabled), transfer the contents of the final frame to the host, and restart
framesync search automatically unless switched to IDLE.
See:
o
o
RxData 0 - $B8 read
RxAuxData Read - $CC read.
2014 CML Microsystems Plc
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