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CMX7042L4 参数 Datasheet PDF下载

CMX7042L4图片预览
型号: CMX7042L4
PDF下载: 下载PDF文件 查看货源
内容描述: [Modem, PQFP48, LQFP-48]
分类和应用: 电信电信集成电路
文件页数/大小: 61 页 / 3203 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
 浏览型号CMX7042L4的Datasheet PDF文件第33页浏览型号CMX7042L4的Datasheet PDF文件第34页浏览型号CMX7042L4的Datasheet PDF文件第35页浏览型号CMX7042L4的Datasheet PDF文件第36页浏览型号CMX7042L4的Datasheet PDF文件第38页浏览型号CMX7042L4的Datasheet PDF文件第39页浏览型号CMX7042L4的Datasheet PDF文件第40页浏览型号CMX7042L4的Datasheet PDF文件第41页  
AIS Baseband IC with/without RF Synthesiser  
CMX7032/CMX7042  
30 tick fixed delay  
2
10  
10  
17  
10  
0
3
7
5
B
Modulation at Input to the  
Tx Filters  
Last  
bit  
Modulation at the  
Mod 1 & 2 Output  
Last  
bit  
20 tick Tx filter delay  
Time  
Figure 13 Typical AIS Transmission  
Table 8 Example Tx Event Sequence Setup  
Parameter  
Event ID delay  
total  
Explanation  
Insert 10 tick delay then start monitoring the chosen Rx  
input for a signal which may cause an abort (if CSTDMA  
enabled).  
CSTDMA_START  
1
10  
20  
Insert 17 tick delay then start feeding data to the transmit  
modulator and filters (this allows for the 20 tick storage  
delay in the Tx filters so that modulated data appears at  
the end of the RAMDAC ramp_up period tick 47).  
MODULATE_START  
5
17  
37  
CSTDMA_END  
Tx_en_hi  
2
3
10  
0
47  
47  
Insert 10 tick delay then stop CSTDMA monitoring.  
Set TXENA line high (assuming not aborted)  
Insert 3 tick delay then initiate the RAMDAC ramp-up (for  
AIS, the transmitted signal will be carrier only at this  
point)  
RAMDAC_UP  
4
3
50  
At this point during a transmission the CMX7032/CMX7042 feeds the entire message to the transmit modulator bit-  
by-bit. All subsequent transmit events are timed relative to the end of the last message bit, indicated by the  
MODULATE_END event.  
RAMDAC_DOWN  
7
8
6
0
7
5
0
Initiate the RAMDAC ramp-down immediately  
Insert 7 tick delay (to allow RAMDAC to fully ramp down)  
then set the TXENA line low.  
Tx_en_lo  
7
MODULATE_END  
12  
Allows for process delays.  
Notes:  
1. It is essential that the CSTDMA, and MODULATE START events precede their associated END events,  
otherwise undesirable results will be obtained.  
2. MODULATE_START must appear in the first group of timed events (table entries 15), MODULATE_END must  
appear in the final group (table entries 6-8). It is feasible to place the RAMDAC_DOWN task before the  
MODULATE_END task.  
Assuming that the timing_start value has been set to 10 (see User Manual section 9.19.2.7) and the RAMDAC is  
set to its default values (312us), this sequence approximates to the Class B CSTDMA timing with ideal hardware  
(RAMDAC starts 20bits / 50 ticks after SLOTCLK).  
7.6.6 Modulation Formats  
The CMX7032/CMX7042 can be configured to drive either a two-point VCO and Reference modulator or  
an I/Q modulator by selecting the appropriate Config task (see User Manual section 9.19.2.1).  
Typical Tx spectrum plots for both modes are shown below (generated by modulating a signal generator  
with the outputs of MOD1 and MOD2 and then analysing the signal on a spectrum analyser). Note that  
these plots represent the steady-state transmission and so are shown with the Class A and Class B-  
SOTDMA spectrum mask (-70dBc). The Class BCSTDMA standard specifies a slotted transmission with  
a mask at 60dBc.  
2012 CML Microsystems Plc  
37  
D/7032/42_FI1.2/13