AIS Baseband IC with/without RF Synthesiser
CMX7032/CMX7042
7.6.3 Transmit Example
The following detailed example describes the process of loading and transmitting an AIS message in Burst
mode.
Table 6 AIS Burst Transmit Example
Description
Cmd
Reg
Free
1
Data
Task
TBFREE TxDONE
1. The host should ensure that the TBFREE, Data Task and
CmdReg Free bits are set.
2. The host loads the first N(typically 4) data words into the write
data registers.
1
1
1
1
1
1
1
3. The host issues a DataWordResetN_Tx Data Task.
4. Device reads the Command register & notes task types.
5. Device carries out the data task by copying the N data words as
the first N data words of the data buffer.
0
1
1
1
0
1
1
1
1
1
1
1
6. The steps above may be repeated (Using DataWordWriteN_Tx
tasks) to load many words until the data buffer contains enough
data to carry out the desired modem task.
7. The host writes a TXB task to the Command register to start the
Tx process.
0
1
1
1
8. Device reads the Command register.
1
1
1
1
0
1
1
0
9. Device codes the data. Tx state changes from Idle to Tx Pending
10. When the transmit point arrives (SLOTCLK), the Tx State changes
to Tx in progress and the TxSequence is activated.
11. The Tx Modem Buffer will gradually empty as the Tx Modulator
continues transmitting.
12. When the transmission ends the TxDone bit in the Status register
will be set, generating an interrupt if enabled. The host should
then check the Tx state bits in the Status2 register to see if
transmission was successful.
1
1
1
1
1
1
1
1
Note that if CSTDMA mode is active and a carrier is sensed in the selected channel at the beginning of the
requested transmit slot, the transmission is aborted (Tx State changes to Tx aborted, carrier sensed) – this
causes a TxDone interrupt to be generated, however the data in the Tx Data Buffer is retained, so the µC
can choose to issue an AbortTx task and clear the Tx Data Buffer, or reschedule the transmission in
another slot.
7.6.4 AIS Raw Mode Transmit
In AIS raw mode, transmit data is passed directly from the Tx Data Buffer to the GMSK modulator. The µC
must calculate the entire transmitted message including the training sequence, HDLC processing
(start/stop flags, bit stuffing, and CRC insertion) and NRZI coding. Note: In AIS raw mode, data words
written to the CMX7032/CMX7042 are transmitted most significant bit first. The AIS message structure,
however, requires each message byte to be output least significant bit first. The µC must therefore ensure
that during the process of HDLC processing and NRZI coding that the resulting data bytes are correctly
reversed.
7.6.5 Transmitter Timing Control
The CMX7032/CMX7042 can be configured to control the timing of transmission events whenever a Tx
Burst Modem task is executed. This includes the enabling of external RF circuits (e.g. synthesisers and
power amplifier), as well as the time at which internal data modulation begins. The flexibility of this timing
control allows the CMX7032/CMX7042 to be simply adapted to the characteristics of the RF transmit
circuits. The control of the external RF transmit circuits is performed using the TXENA pin and the DAC1
ramping function.
2012 CML Microsystems Plc
35
D/7032/42_FI1.2/13
CMLMICRO [ CML MICROCIRCUITS ]
