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CMX608 参数 Datasheet PDF下载

CMX608图片预览
型号: CMX608
PDF下载: 下载PDF文件 查看货源
内容描述: [Integrated Input and Output Channel Filters]
分类和应用:
文件页数/大小: 70 页 / 3411 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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RALCWI Vocoder  
CMX608/CMX618/CMX638  
SVCREQ register address $0E  
7
6
5
4
3
2
1
0
Service Request Value  
This write only register sends special service requests to the device. Once the request has been  
processed, bit 14 (SVC) of the STATUS ($40) register will be set to '1' and, if enabled, IRQN will  
go low. The SVCACK ($2E) register will contain the status value, indicating whether the request  
was successful. No other C-BUS registers should be read or written whilst this command is in  
progress.  
Bits 0 to 7  
The 8-bit value written to this register specifies which operation to perform.  
Currently, only 3 operations are defined. All other values are reserved:  
$01  
$09  
$0A  
Request to load a Function Image. Please refer to section 6.7 for  
further information.  
Request to turn on the PLEVEL functionality. Please refer to the  
description of the PLEVEL ($31) register for further information.  
Request to turn off the PLEVEL functionality.  
FRAMETYPEW register address $0F  
7
6
5
4
3
2
1
0
Frame 4  
Frame 3  
Frame 2  
Frame 1  
This write-only register contains the frame type for each of the 20ms raw Vocoder frames being  
supplied for decoding. The fields in this register must be set before the packet that contains the  
frames is written to the device. The information in this register is used when the device is  
configured to accept packets of raw Vocoder frames (without any FEC) and the DTX  
(discontinuous transmission) option is enabled.  
If the DTX option is disabled, the value in this register is unused.  
The device can be set to decode 1, 2, 3 or 4 frames, representing 20ms, 40ms, 60ms or 80ms of  
voice. For each frame, this register holds the corresponding 2-bit frame type attribute.  
Bit 1/3/5/7  
Bit 0/2/4/6  
Frame Type  
0
0
1
1
0
1
0
1
Data frame  
reserved  
SID frame  
reserved  
The device must be given full frames of data to decode. For a data frame, all of the bits are used.  
For an SID frame, only the first 18 bits are used.  
NOTE: The same number of bytes must be written to the DECFRAME register ($10), regardless of  
frame type. This information indicates how much of it is significant.  
DECFRAME register address $10  
7
6
5
4
3
2
1
0
Decoder Frame  
This write only register accepts packets of encoded speech data frames for decoding. This is a  
byte wide streaming register that will take up to 144 bytes of data. The frequency and amount of  
data to be written depends on how the device has been configured with the VCFG register ($07).  
Bit 7 is the msb.  
2014 CML Microsystems Plc  
42  
D/608_18_38/11  
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