EP9315
Enhanced Universal Platform SOC Processor
DC Characteristics
(T = 0 to 70° C; CVDD = VDD_PLL = 1.8; RVDD = 3.3 V;
A
All grounds = 0 V; all voltages with respect to 0 V unless otherwise noted)
Parameter
Symbol
Min
Max
Unit
Voh
Vol
Vih
Vil
Iih
High level output voltage
Low level output voltage
High level input voltage
Low level input voltage
High level leakage current
Low level leakage current
Iout = -4 mA
Iout = 4 mA
(Note 4)
0.85 × RVDD
-
V
V
-
0.15 × RVDD
VDD + 0.3
0.35 × RVDD
10
(Note 5)
(Note 5)
(Note 5)
(Note 5)
0.65 × RVDD
V
-0.3
V
Vin = 3.3 V
Vin = 0
-
-
µA
µA
Iil
-10
Parameter
Min
Typ
Max
Unit
Power Supply Pins (Outputs Unloaded), 25° C
Power Supply Current:
CVDD / VDD_PLL Total
RVDD
-
-
190
45
240
80
mA
mA
Low-Power Mode Supply Current
CVDD / VDD_PLL Total
RVDD
-
-
2
1
3.5
2
mA
mA
Note: 4. For open drain pins, high level output voltage is dependent on the external load.
5. All inputs that do not include internal pull-ups or pull-downs, must be externally driven for proper operation (See Table S on
page 60). If an input is not driven, it should be tied to power or ground, depending on the particular function. If an I/O pin is not
driven and programmed as an input, it should be tied to power or ground through its own resistor.
DS638PP4
©Copyright 2005 Cirrus Logic (All Rights Reserved)
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