CS8900A
Crystal LAN™ Ethernet Controller
PacketPage # of
Address Bytes
Type
Description
Cross Reference
Section 4.4 on page 49
0100h
0120h
0140h
32 Read/Write Configuration & Control Registers
(2 bytes per register)
32
Read-only Status & Event Registers
(2 bytes per register)
Section 4.4 on page 49
Note 2
4
-
Reserved
Initiate Transmit Registers
0144h
0146h
0148h
2
2
8
Write-only TxCMD (transmit command)
Section 4.5 on page 69,
Section 5.6 on page 99
Write-only TxLength (transmit length)
Section 4.5 on page 69,
Section 5.6 on page 99
-
Reserved
Note 2
Address Filter Registers
0150h
0158h
015Eh
8
Read/Write Logical Address Filter (hash table)
Section 4.6 on page 71,
Section 5.2.10 on page 87
6
Read/Write Individual Address
Section 4.6 on page 71,
Section 5.2.10 on page 87
674
-
Reserved
Note 2
Frame Location
0400h
2
2
-
Read-only RXStatus (receive status)
Read-only RxLength (receive length, in bytes)
Read-only Receive Frame Location
Write-only Transmit Frame Location
Section 4.7 on page 72,
Section 5.2 on page 78
0402h
0404h
0A00
Section 4.7 on page 72,
Section 5.2 on page 78
Section 4.7 on page 72,
Section 5.2 on page 78
-
Section 4.7 on page 72,
Section 5.6 on page 99
Notes: 1. All registers are accessed as words only.
2. Read operation from the reserved location provides undefined data. Writing to a reserved location or
undefined bits may result in unpredictable operation of the CS8900A.
Table 13. PacketPage Memory Address Map (continued)
CIRRUS LOGIC PRODUCT DATASHEET
DS271F4
43