CS8900A
Crystal LAN™ ISA Ethernet Controller
tion Address (DA), Source Address (SA), Length
field, Data field, pad bits (if necessary), and Frame
Check Sequence (FCS, also called CRC). Figure 9
shows the format of a frame. The term "frame data"
refers to all the data from the DA to the FCS that is
to be transmitted, or that has been received.
Packet Received
Preamble and
Start-of-Frame
Delimiter Removed
5.2.1.3 Transfer
Frame Pre-
Processed
The term "transfer" refers to moving data across the
ISA bus, to and from the CS8900A. During receive
operations, only frame data are transferred from the
CS8900A to the host (the preamble and SFD are
stripped off by the CS8900A’s MAC engine). The
FCS may or may not be transferred, depending on
the configuration. All transfers to and from the
CS8900A are counted in bytes, but may be padded
for double word alignment.
Frame
Temporarily
Buffered
No
Yes
Use
DMA?
Frame Held
On Chip
Frame DMAed
to Host Memory
5.2.2 Receive Configuration
After each reset, the CS8900A must be configured
for receive operation. This can be done automati-
cally using an attached EEPROM or by writing
configuration commands to the CS8900A’s internal
registers (see Section 3.4 on page 21). The items
that must be configured include:
Host Reads
Frame from
CS8900A Memory
Host Reads
Frame from
Host Memory
Figure 20. Frame Reception
•
•
•
•
which physical interface to use;
5.2.1 Terminology: Packet, Frame, and Transfer
which types of frames to accept;
The terms Packet, Frame, and Transfer are used ex-
tensively in the following sections. They are de-
fined below for clarity:
which receive events cause interrupts; and,
how received frames are transferred.
5.2.1.1 Packet
5.2.2.1 Configuring the Physical Interface
The term "packet" refers to the entire serial string
of bits transmitted over an Ethernet network. This
includes the preamble, Start-of-Frame Delimiter
(SFD), Destination Address (DA), Source Address
(SA), Length field, Data field, pad bits (if neces-
sary), and Frame Check Sequence (FCS, also
called CRC). Figure 9 shows the format of a pack-
et.
Configuring the physical interface consists of de-
termining which Ethernet interface should be ac-
tive, and enabling the receive logic for serial
reception. This is done via the LineCTL register
(Register 13) and is described in Table18.
5.2.2.2 Choosing which Frame Types to Accept
The RxCTL register (Register 5) is used to deter-
mine which frame types will be accepted by the
CS8900A (a receive frame is said to be "accepted"
when the frame is buffered, either on chip or in host
5.2.1.2 Frame
The term "frame" refers to the portion of a packet
from the DA to the FCS. This includes the Destina-
CIRRUS LOGIC PRODUCT DATA SHEET
DS271PP3
81
CIRRUS [ CIRRUS LOGIC ]
