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CS5508-BS 参数 Datasheet PDF下载

CS5508-BS图片预览
型号: CS5508-BS
PDF下载: 下载PDF文件 查看货源
内容描述: 非常低功耗的16位和20位A / D转换器 [VERY LOW POWER 16BIT AND 20 BIT A/D CONVERTERS]
分类和应用: 转换器
文件页数/大小: 40 页 / 722 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS5505/6/7/8  
Understanding Converter Calibration  
8000H (16-bit) or 80000H (20-bit) and multi-  
plies the LSB size by two. This means that the  
bipolar measurement range is not calibrated from  
full scale positive to full scale negative. Instead  
it is calibrated from the bipolar zero scale point  
to full scale positive. The slope factor is then  
extended below bipolar zero to accommodate the  
negative input signals. The converter can be  
used to convert both unipolar and bipolar signals  
by changing the BP/UP pin. Recalibration is not  
required when switching between unipolar and  
bipolar modes.  
Calibration can be performed at any time. A  
calibration sequence will minimize offset errors  
and set the gain slope scale factor. The delta-  
sigma modulator in the converter is a differential  
modulator. To calibrate out offset error, the  
converter internally connects the modulator dif-  
ferential inputs to an internal VREF- voltage and  
measures the 1’s density output from the modu-  
lator. It stores the digital code representation for  
this 1’s density in SRAM and remembers this  
code as being the zero scale point for the A/D  
conversion. The converter then connects the  
negative modulator differential input to the  
VREF- input and the positive modulator differ-  
ential input to the VREF+ voltage. The 1’s  
density output from the modulator is then re-  
corded. The converter uses the digital  
representation of this 1’s density along with the  
digital code for the zero scale point and calcu-  
lates a gain scale factor. The gain scale factor is  
stored in SRAM and used for calculating the  
proper output codes during conversions.  
Converter Performance  
The CS5505/6/7/8 A/D converters have excellent  
linearity performance. Calibration minimizes the  
errors in offset and gain. The CS5505/7 devices  
have no missing code performance to 16-bits.  
The CS5506/8 devices have no missing code  
performance to 20-bits. Figure 7 illustrates the  
DNL of the 16-bit CS5505. The converters  
achieve Common Mode Rejection (CMR) at dc  
of 105 dB typical, and CMR at 50 and 60 Hz of  
120 dB typical.  
The states of A0, A1 and BP/UP are ignored  
during calibration but should remain stable  
throughout the calibration period to minimize  
noise.  
The CS5505/6/7/8 can experience some drift as  
temperature changes. The CS5505/6/7/8 use  
chopper-stabilized techniques to minimize drift.  
Measurement errors due to offset or gain drift  
can be eliminated at any time by recalibrating  
the converter.  
When conversions are performed in unipolar  
mode or in bipolar mode, the converter uses the  
same calibration factors to compute the digital  
output code. The only difference is that in bipo-  
lar mode the on-chip microcontroller offsets the  
computed output word by a code value of  
+1  
+1/2  
0
-1/2  
-1  
0
32,768  
65,535  
Codes  
Figure 7. CS5505 Differential Nonlinearity plot.  
DS9F5  
17  
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