CS49300 Family DSP
WRITE_*(DOWNLOAD_
BOOT, MSG_SIZE)
RESET(LOW) (NOTE 1)
RESET(HIGH) (NOTE 2)
WAIT 500 µs
READ HOSTCTL
REGISTER
Notes: 1. RESET must be held LOW for
trstl
N
.
TIMEOUT AFTER
20MS (NOTE 3)
HOUTRDY LOW?
2. It should be noted that mode
pins are used to configure the
CS493XX serial communication
mode. These mode pins are
latched internally on the rising
edge of reset. The pins can be
set dynamically by a
Y
READ_*(MESSAGE)
N
microprocessor or can be
statically pulled HIGH or LOW. If
these pins are driven
MESSAGE ==
BOOTSTART?
EXIT(ERROR)
dynamically, setup and hold
times must be satisfied as stated
in the CS493XX Data Sheet.
More information about the
function of the mode pins can be
found in the CS493XX Data
Sheet and in Section 6, “Control”
on page 32.
Y
WRITE_*(.LD FILE,
DOWNLOAD FILE SIZE)
READ HOSTCTL
REGISTER
3. Time-out values reflect worst
case response time for the
CS493XX. The values shown
may be used for the host’s time-
out control loop.
N
TIMEOUT AFTER
20MS (NOTE 3)
HOUTRDY LOW?
Y
4. 5 ms is typical but this time is
application code specific and
may be as high as 10 ms. Wait
times should be verified by the
designer.
READ_*(MESSAGE)
N
MESSAGE ==
BOOT_SUCCESS?
5. Hardware configuration
messages are covered in
EXIT(ERROR)
Section 6, “Control” on page 32.
Application configuration
Y
messages are covered in each
application code user’s manual.
WRITE_*(BOOT_
SUCCESS_RECEIVED,
MSG-SIZE)
DOWNLOAD COMPLETE
WAIT 5 MS (NOTE 4)
WRITE_*(HW_CONFIG_MSG,
HW_MSG_SIZE)
(NOTE 5)
WRITE_*(SW_CONFIG_MSG,
SW_MSG_SIZE)
(NOTE 5)
WRITE_*(KICKSTART,
MSG_SIZE)
(NOTE 5)
Figure 34. Typical Parallel Boot and Download Procedure
54
DS339PP4
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