CS4297
CrystalClear™ SoundFusion™ Audio Codec ’97
Slot 2: AC’97 Register Write Data
Slot 2 indicates the Register Data of the current frame’s register write access.The 20 bits of this slot are
defined as:
F36 F37 F38 F39 F40 F41 F42 F43 F44 F45 F46 F47 F48 F49 F50 F51 F52 F53 F54 F55
Bit 19 18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
WD15 WD14 WD13 WD12 WD11 WD10 WD9 WD8 WD7 WD6 WD5 WD4 WD3 WD2 WD1 WD0
Reserved
WD15 - WD0 - Bits 19-4 contain the 16-bit value to be written to the register. Bits 3-0 are ignored, but
should always be ‘cleared’. If the access is a read, this slot is ignored. The data in Slot 2 will only be valid
when the Slot Valid bit 13 of Slot 0 (F2) corresponding to Slot 2 is ‘set’.
NOTE: For any write to an AC’97 Register, the write is defined to be an ‘atomic’ access. This means that
when the slot valid bit for Slot 1 is ‘set’, the slot valid bit for Slot 2 should always be ‘set’ during the same
audio frame. No write access may be split across 2 frames.
Slot 3: Left Channel PCM Playback Data
Slot 3 contains the left channel data. The 20 bits of this slot are defined as:
F56 F57 F58 F59 F60 F61 F62 F63 F64 F65 F66 F67 F68 F69 F70 F71 F72 F73 F74 F75
Bit 19 18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
LP17 LP16 LP15 LP14 LP13 LP12 LP11 LP10 LP9 LP8 LP7 LP6 LP5 LP4 LP3 LP2 LP1 LP0 Reserved
LP17 - LP0 - This is the 18-bit PCM playback 2’s compliment data for the left channel DAC in the
CS4297. The PCM playback data will be taken from the most significant 18 of the 20 bits in the slot. The
least significant 2 bits will be ignored. Any PCM data from the AC’97 Controller that is not at least 18-
bits should be left justified in Slot 3 and dithered or zero-padded in the unused bit positions.
Slot 4: Right Channel PCM Playback Data
Slot 4 contains the right channel data. The 20 bits of this slot are defined as:
F76 F77 F78 F79 F80 F81 F82 F83 F84 F85 F86 F87 F88 F89 F90 F91 F92 F93 F94 F95
Bit 19 18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RP17 RP16 RP15 RP14 RP13 RP12 RP11 RP10 RP9 RP8 RP7 RP6 RP5 RP4 RP3 RP2 RP1 RP0 Reserved
RP17 - RP0 - This is the 18-bit PCM playback 2’s compliment data for the right channel DAC in the
CS4297. The PCM playback data will be taken from the most significant 18 of the 20 bits in the slot. The
least significant 2 bits will be ignored. Any PCM data from the AC’97 Controller that is not at least 18-
bits should be left justified in Slot 4 and dithered or zero-padded in the unused bit positions.
DS242F5
17
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