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CS42426-DQZR 参数 Datasheet PDF下载

CS42426-DQZR图片预览
型号: CS42426-DQZR
PDF下载: 下载PDF文件 查看货源
内容描述: 114分贝192千赫6声道编解码器PLL [114 dB, 192 kHz 6-Ch Codec with PLL]
分类和应用: 解码器编解码器消费电路商用集成电路
文件页数/大小: 73 页 / 1381 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS42426  
4.3.3  
Digital Volume and Mute Control  
Each DAC’s output level is controlled via the Volume Control registers operating over the range of 0 to  
-127 dB attenuation with 0.5 dB resolution. See “Volume Control (addresses 0Fh, 10h, 11h, 12h, 13h,  
14h)” on page 53. Volume control changes are programmable to ramp in increments of 0.125 dB at the  
rate controlled by the SZC[1:0] bits in the Digital Volume Control register. See “Volume Transition Control  
(address 0Dh)” on page 51.  
Each output can be independently muted via mute control bits in the register “Channel Mute (address  
0Eh)” on page 52. When enabled, each XX_MUTE bit attenuates the corresponding DAC to its maximum  
value (-127 dB). When the XX_MUTE bit is disabled, the corresponding DAC returns to the attenuation  
level set in the Volume Control register. The attenuation is ramped up and down at the rate specified by  
the SZC[1:0] bits.  
The Mute Control pin, MUTEC, is typically connected to an external mute control circuit. The Mute Control  
pin outputs high impedance during Power-Up or in Power-Down Mode by setting the PDN bit in the reg-  
ister “Power Control (address 02h)” on page 43 to a ‘1’. Once out of Power-Down Mode, the pin can be  
controlled by the user via the control port, or automatically asserted high when zero data is present on all  
DAC inputs, or when serial port clock errors are present. To prevent large transients on the output, it is  
desirable to mute the DAC outputs before the Mute Control pin is asserted. Please see the MUTEC pin  
in the Pin Descriptions section for more information.  
Each of the GPO1-GPO7 can be programmed to provide a hardware MUTE signal to individual circuits.  
Each pin can be programmed as an output, with specific muting capabilities as defined by the function  
bits in the register “General-Purpose Pin Control (addresses 29h to 2Fh)” on page 58.  
4.3.4  
ATAPI Specification  
The CS42426 implements the channel-mixing functions of the ATAPI CD-ROM specification. The  
ATAPI functions are applied per A-B pair. Refer to Table 14 on page 54 and Figure 9 for additional infor-  
mation.  
A Channel  
Volume  
Control  
Left Channel  
Audio Data  
MUTE  
AOUTAx  
Σ
Σ
DAC_SDINx  
B Channel  
Volume  
Control  
Right Channel  
Audio Data  
AOUTBx  
MUTE  
Figure 9. ATAPI Block Diagram (x = channel pair 1, 2, 3)  
22  
DS604F1