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CS42406-DQ 参数 Datasheet PDF下载

CS42406-DQ图片预览
型号: CS42406-DQ
PDF下载: 下载PDF文件 查看货源
内容描述: [Consumer Circuit, PQFP48, MS-026, LQFP-48]
分类和应用: 商用集成电路
文件页数/大小: 52 页 / 717 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS42406  
4. APPLICATIONS  
4.1  
Single, Double, and Quad-Speed Modes  
ADC Serial Port  
4.1.1  
The ADC’s internal to the CS42406 can support output sample rates from 2 kHz to 200 kHz, and a base  
MCLK/ADC_LRCK ratio of either 256x or 384x. The proper speed mode can be determined by the desired  
output sample rate and the external MCLK/ADC_LRCK ratio, as shown in Table 1 and Table 2. Please  
see section 4.2 for a discussion on how to select the desired speed mode.  
MCLK/ADC_LRCK  
Speed Mode  
Single-Speed Mode  
Ratio  
512x  
256x  
256x  
128x  
128x  
64x*  
Output Sample Rate Range (kHz)  
43 - 50  
2 - 50  
Double-Speed Mode  
Quad-Speed Mode  
86 - 100  
50 - 100  
172 - 200  
100 - 200  
* Quad-Speed Mode, 64x only available in Master Mode.  
Table 1. ADC Speed Modes and the Associated Output Sample Rates (Fs) for 256x Mode  
MCLK/LRCK  
Speed Mode  
Single-Speed Mode  
Ratio  
768x  
384x  
384x  
192x  
192x  
96x*  
Output Sample Rate Range (kHz)  
43 - 50  
2 - 50  
Double-Speed Mode  
Quad-Speed Mode  
86 - 100  
50 - 100  
172 - 200  
100 - 200  
* Quad Speed Mode, 96x only available in Master Mode.  
Table 2. ADC Speed Modes and the Associated Output Sample Rates (Fs) for 384x Mode  
4.1.2  
DAC Serial Port  
4.1.2a  
Stand Alone Mode  
The DAC’s internal to the CS42406 operate in one of four operational modes determined by the DAC_Mx  
pins when in Stand Alone Mode. Sample rates outside the specified range for each mode are not support-  
ed. Refer to Table 3.  
33