CAT5259
ABSOLUTE MAXIMUM RATINGS(1)
Parameters
Ratings
-55 to +125
-65 to +150
-2.0 to +VCC + 2.0
-2.0 to +7.0
1.0
Units
ºC
Temperature Under Bias
Storage Temperature
°C
V
(1) (2)
Voltage on Any Pin with Respect to VSS
VCC with Respect to Ground
V
Package Power Dissipation Capability (TA = 25ºC)
Lead Soldering Temperature (10sec)
Wiper Current
W
300
ºC
±6
mA
RECOMMENDED OPERATING CONDITIONS
Parameters
VCC
Ratings
+2.5 to +6
-40 to +85
Units
V
Industrial Temperature
°C
POTENTIOMETER CHARACTERISTICS
(Over recommended operating conditions unless otherwise stated.)
Limits
Symbol Parameter
Test Conditions
Units
Min
Typ.
100
50
Max.
RPOT
RPOT
Potentiometer Resistance (100kΩ)
kΩ
kΩ
Potentiometer Resistance (50kΩ)
Potentiometer Resistance
Tolerance
±20
%
RPOT Matching
1
%
mW
mA
Ω
Power Rating
25°C, each pot
50
IW
RW
Wiper Current
+3
Wiper Resistance
Wiper Resistance
Voltage on any RH or RL Pin
Noise
IW = ±3mA @ VCC = 3V
IW = ±3mA @ VCC = 5V
VSS = 0V
200
100
300
150
VCC
RW
Ω
VTERM
VN
VSS
V
(4)
nV√Hz
Resolution
0.4
%
(8)
Absolute Linearity (5)
Relative Linearity (6)
Temperature Coefficient of RPOT
Ratiometric Temp. Coefficient
RW(n)(actual)-R(n)(expected)
±1
LSB (7)
LSB (7)
ppm/ºC
ppm/ºC
pF
(8)
RW(n+1)-[RW(n)+LSB
]
±0.2
TCRPOT
TCRATIO
(4)
±300
(4)
(4)
20
CH/CL/CW Potentiometer Capacitances
fc Frequency Response
10/10/25
0.4
RPOT = 50kΩ (4)
MHz
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20ns. Maximum DC
voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20ns.
(3) Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to VCC +1V.
(4) This parameter is tested initially and after a design or process change that affects the parameter.
(5) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a potentiometer.
(6) Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentio-
meter. It is a measure of the error in step size.
(7) LSB = RTOT / 255 or (RH - RL) / 255, single pot
(8) n = 0, 1, 2, ..., 255
© Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
3
Doc. No. MD-2000 Rev. H
CATALYST [ CATALYST SEMICONDUCTOR ]
