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CAT28C64BG-12T 参数 Datasheet PDF下载

CAT28C64BG-12T图片预览
型号: CAT28C64BG-12T
PDF下载: 下载PDF文件 查看货源
内容描述: 64K位CMOS并行EEPROM [64K-Bit CMOS PARALLEL EEPROM]
分类和应用: 内存集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 13 页 / 415 K
品牌: CATALYST [ CATALYST SEMICONDUCTOR ]
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CAT28C64B  
A.C. CHARACTERISTICS, Write Cycle  
VCC = 5V 10%, unless otherwise specified.  
28C64B-90  
28C64B-12  
28C64B-15  
Symbol  
tWC  
Parameter  
Min. Max. Min. Max.  
Min. Max. Units  
Write Cycle Time  
Address Setup Time  
Address Hold Time  
CE Setup Time  
5
5
5
ms  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ms  
µs  
tAS  
0
100  
0
0
100  
0
0
100  
0
tAH  
tCS  
tCH  
CE Hold Time  
0
0
0
(2)  
tCW  
CE Pulse Time  
110  
0
110  
0
110  
0
tOES  
tOEH  
OE Setup Time  
OE Hold Time  
0
0
0
(2)  
tWP  
WE Pulse Width  
Data Setup Time  
Data Hold Time  
110  
60  
0
110  
60  
0
110  
60  
0
tDS  
tDH  
(1)  
tINIT  
Write Inhibit Period After Power-up  
Byte Load Cycle Time  
5
10  
5
10  
5
10  
(1)(3)  
tBLC  
.05  
100  
.05  
100  
.05  
100  
Note:  
(1) This parameter is tested initially and after a design or process change that affects the parameter.  
(2) A write pulse of less than 20ns duration will not initiate a write cycle.  
(3) A timer of duration t  
max. begins with every LOW to HIGH transition of WE. If allowed to time out, a page or byte write will begin;  
BLC  
however a transition from HIGH to LOW within t  
max. stops the timer.  
BLC  
Doc. No. 1011, Rev. F  
6