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CAT25160VP2I-GT3 参数 Datasheet PDF下载

CAT25160VP2I-GT3图片预览
型号: CAT25160VP2I-GT3
PDF下载: 下载PDF文件 查看货源
内容描述: 8 KB和16 KB的SPI串行EEPROM CMOS [8-Kb and 16-Kb SPI Serial CMOS EEPROM]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 17 页 / 254 K
品牌: CATALYST [ CATALYST SEMICONDUCTOR ]
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CAT25080, CAT25160  
STATUS REGISTER  
The Status Register, as shown in Table 2, contains a  
number of status and control bits.  
user with the WRSR command and are non-volatile.  
The user is allowed to protect a quarter, one half or the  
entire memory, by setting these bits according to Table  
3. The protected blocks then become read-only.  
¯¯¯¯  
The RDY (Ready) bit indicates whether the device is  
busy with a write operation. This bit is automatically set  
to 1 during an internal write cycle, and reset to 0 when  
the device is ready to accept commands. For the host,  
this bit is read only.  
The WPEN (Write Protect Enable) bit acts as an enable  
¯¯¯  
for the WP pin. Hardware write protection is enabled  
¯¯¯  
when the WP pin is low and the WPEN bit is 1. This  
condition prevents writing to the status register and to  
the block protected sections of memory. While  
hardware write protection is active, only the non-block  
protected memory can be written. Hardware write  
The WEL (Write Enable Latch) bit is set/reset by the  
WREN/WRDI commands. When set to 1, the device is  
in a Write Enable state and when set to 0, the device is  
in a Write Disable state.  
¯¯¯  
protection is disabled when the WP pin is high or the  
¯¯¯  
WPEN bit is 0. The WPEN bit, WP pin and WEL bit  
The BP0 and BP1 (Block Protect) bits determine which  
blocks are currently write protected. They are set by the  
combine to either permit or inhibit Write operations, as  
detailed in Table 4.  
Table 2. Status Register  
7
6
0
5
0
4
0
3
2
1
0
¯¯¯¯  
RDY  
WPEN  
BP1  
BP0  
WEL  
Table 3. Block Protection Bits  
Status Register Bits  
Array Address Protected  
Protection  
BP1  
BP0  
0
0
None  
No Protection  
25080: 0300-03FF  
25160: 0600-07FF  
25080: 0200-03FF  
25160: 0400-07FF  
25080: 0000-03FF  
25160: 0000-07FF  
0
1
1
1
0
1
Quarter Array Protection  
Half Array Protection  
Full Array Protection  
Table 4. Write Protect Conditions  
Protected  
Blocks  
Unprotected  
Status  
Register  
¯¯¯  
WP  
WPEN  
WEL  
Blocks  
Protected  
Writable  
Protected  
Writable  
Protected  
Writable  
0
0
1
1
X
X
X
0
1
0
1
0
1
Protected  
Protected  
Protected  
Protected  
Protected  
Protected  
Protected  
Writable  
X
Low  
Low  
High  
High  
Protected  
Protected  
Protected  
Writable  
© 2006 Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
5
Doc. No. 1122 Rev. A