CAT25080, CAT25160
A.C. CHARACTERISTICS
TA = -40°C to +85°C, unless otherwise specified.(1)
VCC = 1.8V-5.5V
VCC = 2.5V-5.5V
Symbol Parameter
Units
MHz
ns
Min.
Max.
Min.
DC
20
Max.
fSCK
tSU
tH
Clock Frequency
Data Setup Time
Data Hold Time
SCK High Time
SCK Low Time
DC
30
30
75
75
5
10
20
ns
tWH
tWL
tLZ
40
ns
40
ns
¯¯¯¯¯
HOLD to Output Low Z
50
2
25
2
ns
(2)
tRI
Input Rise Time
Input Fall Time
µs
(2)
tFI
2
2
µs
¯¯¯¯¯
tHD
tCD
0
0
ns
HOLD Setup Time
¯¯¯¯¯
HOLD Hold Time
10
10
ns
tV
Output Valid from Clock Low
Output Hold Time
75
40
ns
tHO
0
0
ns
tDIS
tHZ
Output Disable Time
50
20
25
ns
¯¯¯¯¯
HOLD to Output High Z
100
ns
¯¯
tCS
50
50
50
10
10
15
15
15
10
10
ns
CS High Time
¯¯
tCSS
tCSH
tWPS
tWPH
ns
CS Setup Time
¯¯
ns
CS Hold Time
¯¯¯
ns
WP Setup Time
¯¯¯
WP Hold Time
ns
(4)
tWC
Write Cycle Time
5
5
ms
Power-Up Timing(2)(3)
Symbol Parameter
Max.
Units
tPUR
tPUW
Power-up to Read Operation
Power-up to Write Operation
1
1
ms
ms
Notes:
(1) AC Test Conditions:
Input Pulse Voltages: 0.3VCC to 0.7VCC
Input rise and fall times: ≤ 10ns
Input and output reference voltages: 0.5VCC
Output load: current source IOL max/IOH max; CL = 50pF
(2) This parameter is tested initially and after a design or process change that affects the parameter.
(3) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.
¯¯
(4) tWC is the time from the rising edge of CS after a valid write sequence to the end of the internal write cycle.
© 2006 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
3
Doc. No. 1122 Rev. A
CATALYST [ CATALYST SEMICONDUCTOR ]
