TMC22091/TMC22191
PRODUCT SPECIFICATION
Block Diagram
OL4-0
FRAME BUFFER INTERFACE
BYPASS
G/R/Y MAP
PD23-0
FORMATTER B/G/CB
MASK, KEY
COMPARATOR R/B/CR
Data Key
KEY
PDC
VVSYNC
VHSYNC
R/R-Y
256 x 8 x 3
COLOR
B/B-Y
LOOK-UP
TABLE
G/Y
INTER-
POLATOR
4:2:2/4:4:4
MATRIX
R-Y
B-Y
LPF
SYNC,
BLANK
INSERT
LPF
CHROMA
MODULATOR
INT
10-bit
D/A
LUMA
INT
10-bit
D/A
CHROMA
ENCODED VIDEO OUTPUT
ANALOG
INTERFACE
BYPASS and OL4:0 on TMC22191 only.
GHSYNC
GENLOCK
INTERFACE
GVSYNC
DIGITAL
SYNC.
GEN.
SUBCARRIER
SYNTHESIZER
INT
VIDEO
SWITCH
10-bit
D/A
COMPOSITE
CVBS7-0
INTERPOLATION
FILTERS
D/A
REF.
CLOCK
CONTROL
JTAG
VREF
COMP
RREF
LDV
PXCK
RESET
D7:0
A1:0
CS
R/W
TDI
TMS
TCK
TDO
JTAG TEST
INTERFACE
CLOCKS
MICROPROCESSOR
INTERFACE
27006A
Functional Description
The TMC22091 and TMC22191 are totally integrated, fully-
programmable digital video encoders with simultaneous
composite and Y/C (S-VIDEO) outputs. The TMC22x91
video outputs are compatible with SMPTE 170M NTSC,
CCIR Report 624 PAL, PAL-M, and NTSC without pedestal
television standards. No external component selection or
tuning is required.
The encoders accept digital image data at the PD port in one
of several formats, which are matrixed into luminance and
chrominance components. The chrominance signals are
modulated onto a digitally synthesized subcarrier. The lumi-
nance and chrominance signals are separately interpolated to
twice the pixel rate, and converted to analog levels by 10-bit
D/A converters. They are also digitally combined and the
resulting composite signal is output by a third 10-bit D/A
converter. This composite signal may be keyed (pixel rate
switching) with a second composite digital video signal pre-
sented to the encoder.
The output video frames may be internally timed by the
TMC22x91, synchronized with the external frame buffer, or
slaved to the companion Genlocking Video Digitizer
(TMC22071). All operational parameters are fully program-
mable over a standard microprocessor port.
Table 1 shows the key features that distinguish between the
TMC22091 and TMC22191. All of the information pre-
sented in this data sheet applies to both products unless oth-
erwise noted. Statements, paragraphs, tables, and figures that
apply to only one or two of the encoders have notation speci-
fying the applicable part number.
2
Timing
The encoder operates from a single clock at twice the system
pixel rate. This frequency may be set between 20 MHz and
36 MHz (pixel rates of 10 Mpps to 18 Mpps). Within this
range are included CCIR-601, D2, and square-pixel formats,
as well as a variety of computer-specific pixel rates. An array
of programmable timing registers allows the software selec-
tion of all pertinent signal parameters to produce NTSC
(with or without 7.5 IRE pedestal) and PAL, and PAL-M
outputs.
Table 1. Comparing the TMC22x91 Encoders
Feature
OL
4-0
pixel inputs for 30
overlay colors
Number of video layers
supported
BYPASS input for
bypassing CLUTs
TMC22091 TMC22191
No
2
No
Yes
4
Yes
Input Formatting
The input section accepts a variety of video and graphics for-
mats, including 24-bit GBR and RGB, 15-bit GBR and
RGB, YCBCR422, YCBCR444, and 8-bit color-indexed data
(Figure 1a and 1b).
The input section of the TMC22x91 includes a key compara-
tor which monitors the pixel data port with three independent
8-bit comparators, and invokes a video key when the selected
registers match the incoming data.
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
