欢迎访问ic37.com |
会员登录 免费注册
发布采购

TMC22191 参数 Datasheet PDF下载

TMC22191图片预览
型号: TMC22191
PDF下载: 下载PDF文件 查看货源
内容描述: 数字视频编码器/分层引擎 [Digital Video Encoders/Layering Engine]
分类和应用: 编码器
文件页数/大小: 60 页 / 394 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
 浏览型号TMC22191的Datasheet PDF文件第5页浏览型号TMC22191的Datasheet PDF文件第6页浏览型号TMC22191的Datasheet PDF文件第7页浏览型号TMC22191的Datasheet PDF文件第8页浏览型号TMC22191的Datasheet PDF文件第10页浏览型号TMC22191的Datasheet PDF文件第11页浏览型号TMC22191的Datasheet PDF文件第12页浏览型号TMC22191的Datasheet PDF文件第13页  
PRODUCT SPECIFICATION
TMC22091/TMC22191
Pin Descriptions
(continued)
Pin Number
Pin Name
CS
84-Lead 100-Lead
PLCC
MQFP
6
72
Value
TTL
Pin Function Description
Chip Select.
When CS is HIGH, the microprocessor interface
port, D
7-0
, is set to HIGH impedance and ignored. When CS is
LOW, the microprocessor can read or write parameters over
D
7-0
. One additional falling edge of CS is needed to move input
data to its assigned working registers.
Bus Read/Write Control.
When R/W and CS are LOW, the
microprocessor can write to the control registers or CLUT over
D
7-0
. When R/W is HIGH and CS is LOW, it can read the
contents of any CLUT address or control register over D
7-0
.
Master Reset Input.
Bringing RESET LOW sets the software
reset control bit, SRESET, LOW, forcing the internal state
machines to their starting states and disabling all outputs.
Bringing RESET HIGH synchronizes the internal pixel clock
(PCK = PXCK / 2) to maintain a defined pipeline delay through
the TMC22x91. If HRESET is set HIGH, the encoder is enabled
when RESET goes HIGH. If HRESET is LOW, the host restarts
the TMC22x91 by setting SRESET HIGH. RESET does not
affect the CLUT or the control registers, except SRESET.
NTSC/PAL Video.
Analog output of composite D/A converter,
nominally 1.35 volt peak-to-peak into a 37.5Ω load.
Luminance-only Video.
Analog output of luminance D/A
converter, nominally 1.35 volt peak-to-peak into a 37.5Ω load.
Chrominance-only Video.
Analog output of chrominance D/A
converter, nominally 1.35 volt peak-to-peak into a 37.5Ω load.
Voltage Reference Input.
External voltage reference input,
internal voltage reference output, nominally 1.235 V.
Compensation Capacitor.
Connection point for 0.1µf
decoupling capacitor.
Current-setting Resistor.
Connection point for external
current-setting resistor for D/A converters. The resistor (392Ω)
is connected between R
REF
and A
GND
. Output video levels
are inversely proportional to the value of R
REF
.
Data Input Port.
Boundary scan data input port.
Scan Select Input.
Boundary scan (HIGH)/normal operation
(LOW) selector.
Scan Clock Input.
Boundary scan clock.
Data Output Port.
Boundary scan data output port.
Positive digital power supply.
Positive analog power supply.
Digital Ground.
Analog Ground.
R/W
7
73
TTL
RESET
5
71
TTL
Video Output
COMPOSITE
LUMA
CHROMA
Analog Interface
V
REF
COMP
R
REF
30
39
31
98
10
99
+1.23 V
0.1
µF
392Ω
33
35
37
2
5
8
1 V
P-P
1 V
P-P
1 V
P-P
JTAG Test Interface
TDI
TMS
TCK
TDO
Power Supply
V
DD
V
DDA
D
GND
A
GND
27, 64, 81 41, 62, 95
40-43
13-17
10, 26, 65, 42, 61, 76,
80
94
32, 34, 36,
38
4, 6, 9,
100
+5 V
+5 V
0.0 V
0.0 V
25
24
23
22
93
92
91
90
TTL
TTL
TTL
TTL
9