TMC22x5yA
PRODUCT SPECIFICATION
Control Register Definitions (continued)
Sync Pulse Generator (11)
7
6
5
4
3
2
1
0
STB
Reg
Bit
Name
STB
Description
11
7-0
Sync to burst. Controls the number of pixels from sync to burst. This signal
starts the burst sample and hold. In SC mode, subtract 25 from the desired
delay to generate this value.
Sync Pulse Generator (12)
7
6
5
4
3
2
1
0
BTV
Reg
Bit
Name
BTV
Description
12
7-0
Burst to video. Controls the number of pixels from STB to the start of active
video.
Sync Pulse Generator (13)
7
6
5
AV
4
3
2
1
0
AV
AV
AV
AV
AV
AV
AV
0
7
6
5
4
3
2
1
Reg
13
Bit
Name
AV
Description
7-0
Active video line 8 lsbs. Bottom 8 bits of the number of pixels during the
7-0
active video line.
Sync Pulse Generator (14)
7
6
5
4
3
2
1
0
Reserved
AV
AV
Reserved
STS
STS
STS
8
9
8
10
9
Reg
14
Bit
7-6
5-4
3
Name
Reserved
AV
Description
Reserved, set to zero.
14
Active video line 2 msbs. Two most significant bits of AV.
Reserved, set to zero.
9-8
Reserved
STS
14
14
2-0
Sync to sync 3 msbs. Three most significant bits of STS.
10-8
24
REV. 1.0.0 2/4/03
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
