欢迎访问ic37.com |
会员登录 免费注册
发布采购

TMC22091R0C 参数 Datasheet PDF下载

TMC22091R0C图片预览
型号: TMC22091R0C
PDF下载: 下载PDF文件 查看货源
内容描述: 数字视频编码器/分层引擎 [Digital Video Encoders/Layering Engine]
分类和应用: 商用集成电路编码器
文件页数/大小: 60 页 / 394 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
 浏览型号TMC22091R0C的Datasheet PDF文件第38页浏览型号TMC22091R0C的Datasheet PDF文件第39页浏览型号TMC22091R0C的Datasheet PDF文件第40页浏览型号TMC22091R0C的Datasheet PDF文件第41页浏览型号TMC22091R0C的Datasheet PDF文件第43页浏览型号TMC22091R0C的Datasheet PDF文件第44页浏览型号TMC22091R0C的Datasheet PDF文件第45页浏览型号TMC22091R0C的Datasheet PDF文件第46页  
TMC22091/TMC22191  
PRODUCT SPECIFICATION  
2-Layer Keying with the TMC22091  
Assigning Video Sources to Layers with the  
TMC22191  
The TMC22091 facilitates the keying of PD port input data  
over the CVBS bus input data. Keying is controlled on a  
pixel-by-pixel basis by either the KEY input pin or the inter-  
nal Data Key. The first two layers in the previous 4-Layer  
Example apply to the TMC22091. The result of keying is an  
effect where a MIDGROUND source image (i.e. Happy Face  
from PD data) is superimposed over a BACKGROUND  
source image (i.e. variable matte color from CVBS data).  
Digital video inputs to the TMC22191 (PD, CVBS, Overlay)  
are assigned to the four layers by choosing one of the 16  
modes of the Layering Control Register. OVERLAY is  
always keyed (switched on a pixel-by-pixel basis from active  
to transparent) by the OL inputs. OVERLAY can not be  
4-0  
programmed to the BACKGROUND layer. The CVBS digi-  
tal video bus can be assigned to any of the four layers and is  
keyed by the KEY input signal or internal Data Key. In  
modes 0 thru 7, the CLUTs are not bypassed and the  
BYPASS input is ignored.  
Table 14. Layer Assignments, Image Sources, and Keying Controls (TMC22191)  
LCR 04  
Background  
Midground  
Foreground  
Downstream Key  
Keying  
Keying  
Control  
Keying  
Control  
LAYMODE  
Image Source  
Image Source  
Image Source:  
Image Source:  
Control  
0
PD(YC C , RGB, CI)  
CVBS  
KEY or  
B
R
Data Key  
1
PD(YC C , RGB, CI)  
CVBS  
KEY or  
OVERLAY  
OL  
4-0  
B
R
Data Key  
2
3
4
PD(YC C , RGB, CI)  
CVBS  
CVBS  
KEY  
KEY  
PD(YC C , RGB, CI) Data Key  
OVERLAY  
OVERLAY  
OL  
OL  
B
R
B
R
4-0  
PD(YC C , RGB, CI)  
PD(YC C , RGB, CI) Data Key  
B R  
B
R
4-0  
CVBS  
OVERLAY  
OL  
4-0  
PD(YC C , RGB, CI) KEY or  
B
R
Data Key  
5
CVBS  
PD(YC C , RGB, CI) KEY or  
OVERLAY  
OL  
B
R
4-0  
Data Key  
6
7
8
PD(YC C , RGB, CI)  
CVBS  
CVBS  
CVBS  
KEY  
OVERLAY  
OVERLAY  
OL  
OL  
PD(YC C , RGB, CI) Data Key  
B R  
B
R
4-0  
PD(YC C , RGB, CI)  
KEY  
PD(YC C , RGB, CI) Data Key  
B
R
4-0  
B
R
PD(YC C , CI)  
KEY or  
B
R
Data Key  
9
A
B
C
PD(RGB)  
PD(RGB)  
PD(RGB)  
PD(RGB)  
PD(YC C , CI)  
BYPASS  
CVBS  
KEY or  
Data Key  
OVERLAY  
OVERLAY  
OL  
B
R
4-0  
4-0  
CVBS  
CVBS  
KEY or  
Data Key  
PD(YC C , CI)  
BYPASS  
OL  
B
R
KEY or  
Data Key  
OVERLAY  
OVERLAY  
OL  
OL  
PD(YC C , CI)  
BYPASS  
4-0  
B R  
PD(YC C , CI)  
BYPASS  
CVBS  
KEY or  
B
R
4-0  
Data Key  
D
E
F
CVBS  
CVBS  
PD(RGB)  
OVERLAY  
OVERLAY  
KEY  
PD(YC C , CI)  
BYPASS  
KEY  
OVERLAY  
OL  
4-0  
B
R
OL  
OL  
PD(RGB)  
CVBS  
PD(YC C , CI)  
BYPASS  
BYPASS  
4-0  
B R  
PD(RGB)  
KEY or  
PD(YC C , CI)  
B R  
4-0  
Data Key  
Notes:  
1. For LAYMODE = 0 to 7, Pixel Data always passes through the CLUTs. FORMAT, INMODE, and the BYPASS pin selects the  
input format for PD according to Table 6.  
23-0  
2. For LAYMODE = 8 to F and BYPASS = HIGH, Data Key is disabled.  
3. Asserting the signal listed under "Keying Control:" enables the corresponding "Signal Source:". Signals with " " are asserted  
by a logic LOW.  
42  
 复制成功!