TMC22091/TMC22191
PRODUCT SPECIFICATION
The digital interpolation filters in TMC22x91 convert the
data stream to a sample rate of twice the pixel rate. As shown
in Figures 27 and 28, the filters decrease the sin(x)/x rolloff
JTAG Test Interface
The JTAG test port accesses registers at every digital I/O pin
except the JTAG test port pins. Table 16 shows the sequence
of the test registers. The register number (Reg) indicates the
order in which the register data is loaded and read (Reg 1 is
loaded and read first, therefore it is at the end of the serial
path). The scan path is 59 registers long. The six TEST pins
of the TMC22091 function as JTAG registers.
and the output spectrum between f /4 and 3f /4 contains
S
S
very little energy. Since there is so little signal energy in this
frequency band, the demands placed on the output recon-
struction filter are greatly reduced. The output filter needs to
be flat to f /4 and have good rejection at 3f /4. The relaxed
S
S
requirements greatly simplify the design of a filter with good
phase response and low group delay distortion. A small
amount of peaking may be used to compensate residual
sin(x)/x rolloff.
The JTAG port is a 4-line interface, following IEEE Std.
1149.1-1990 specifications. The Test Data Input (TDI) and
Test Mode Select (TMS) inputs are referred to the rising
edge of the Test ClocK (TCK) input. The Test Data Output
(TDO) is referred to the falling edge of TCK.
Table 16. JTAG Interface Connections
Reg Pin
Signal
Reg Pin
Signal
Reg Pin
Signal
1
28
29
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
BYPASS (TEST)
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
62
63
66
67
68
69
70
71
72
73
74
75
76
77
78
79
82
83
84
1
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
2
CVBS
CVBS
KEY
13
12
11
10
9
1
0
2
OL (TEST)
3
4
3
CVBS
CVBS
CVBS
CVBS
4
7
6
5
4
4
5
RESET
CS
5
6
6
7
R/W
8
7
OL (TEST)
8
A
1
A
0
3
7
8
OL (TEST)
9
2
6
9
OL (TEST)
11
12
13
14
15
16
17
18
19
20
21
PDC
1
5
10
11
12
13
14
15
16
17
18
19
20
OL (TEST)
VHSYNC
VVSYNC
0
4
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
23
22
21
20
19
18
17
16
15
14
3
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
2
1
0
LDV
PXCK
GVSYNC
GHSYNC
CVBS
CVBS
3
2
46
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