REFERENCE CONSIDERATIONS
The SPT5140 has two reference inputs (Ref In and I
Set
)
and one reference output (Ref Out). The input pins are
connected to the inverting and noninverting inputs of an
internal amplifier that serves as a reference buffer.
The output of the buffer amplifier is the reference for the
current sinks. The amplifier feedback loop is connected
around one of the current sinks to achieve better accu-
racy. (See figure 9.)
Since the analog output currents are proportional to the
digital input data and the reference current (I
Set
), the full-
scale output may be adjusted by varying the reference
current. I
Set
is controlled through the (I
Set
) input on the
SPT5140. A method and equations to set I
Set
are shown
in figure 2. The SPT5140 can use an external negative
voltage reference. The external reference must be stable
to achieve a satisfactory output and the Ref In should be
driven through a resistor to minimize offsets caused by
bias current. The value for I
Set
can be varied with the 500
to 1k
Ω
trimmer to change the full-scale output. A double
50 ohm load (25 ohm) can be driven if I
Set
is increased
by 50% above for doubly-terminated 75 ohm video
applications.
DATA INPUTS AND VIDEO CONTROLS
The SPT5140 has standard single-ended data inputs.
The inputs are registered to produce the lowest differen-
tial data propagation delay (skew) to minimize glitching.
There are also four video control inputs to generate com-
posite video outputs. These are Sync, Blank, Bright and
Reference White or Force High. Also provided is the
Feedthrough control mentioned earlier. The controls and
data inputs are all 10 KH and 100K ECL compatible. In
addition, all have internal pulldown resistors to leave
them at a logic low, so the pins are inactive when not
used. This is useful if the devices are applied as standard
DACs without the need for video controls or if less than
eight bits are used.
The SPT5140 is usually configured in the synchronous
mode. In this mode, the controls and data are synchro-
nized to prevent pixel dropout. This reduces screen-edge
distortions and provides the lowest output noise while
maintaining the highest conversion rate. By leaving the
Feedthrough (FT) control open (low), each rising edge of
the convert (CONV) clock latches decoded data and con-
trol values into a D-type internal register. The registered
data is then converted into the appropriate analog output
Figure 3 – Timing Diagram
t
PWH
CONV
–1.3 V
CONV
t
PWL
t
S
t
H
–1.3 V
Data Control
Inputs
t
DST
1/2 LSB
t
DSC
OUT –
OUT +
t
SI
1/2 LSB
SPT5140
6
3/28/00
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
