Figure 2 – Typical Interface Circuit
Video Monitor
FT
FH
Blank
BRT
Sync
4
Out–
R
3
50/75
Ω
4
D0 (LSB)
D1
D2
D3
Output Current Switches
Video
Control
Inputs
50/75
Ω
COAX
R
4
50/75
Ω
Register
Out+
Video
Data
Inputs
NOTES:
1. V– = –1.2 V (typical) for LM113 or V
BG
2. V+ = –1.2 V
V+
; typ = 1.105 mA
3. I
Set
=
α
T(R
1
+R
2
)
4. R
L
= R
3
/ / R
4
5. V
OUT
= K
[
D4
D5
D6
D7 (MSB)
CONV
4 to 15
Decode
Clock
R1
1 kΩ
R2
1 kΩ
CONV
[
K
1
x I
Set
x R
L
(bright)
]
255–Digital Input Code
255
x I
Set
]
R
L
+
ISet
LM113/313
1kΩ
2 kΩ
V+
(
ISet
*
)
Ref
Buffer
Bandgap
Reference
V
CC
V
EE
V–
.01
µF
Ref In
Jumper J1
6. V
Sync
= (K x I
Set
x R
L
) + (K
2
x I
Set
x R
L
)
K = 15.8069
K
1
= 1.7617
K
2
= 10.0392
7. FB = Ferrite bead, Fair-rite pin 217430011
or equivalent.
8. All reference resistors 1/8 W 1% metal
film, power supply decoupling 50 V
ceramic disc
9.
x
= ECL Termination
10.
= V
CC
= AGND
–5.2 V
Optional External
Reference
Remove J1 For
External Reference
.01
µF
10
µF
FB
11. See figure 9 for detail on Ref Buffer.
–5.2 V
*
An external reference can be used or the reference from
Ref Out can drive three SPT5140s.
12.
= DGND (digital input drivers).
OUTPUT CONSIDERATIONS
The analog outputs are designed to directly drive a dou-
bly terminated 50 or 75 ohm load transmission system as
shown. The source impedances of the SPT5140 outputs
are high impedance current sinks. The load impedance
(R
L
) must be 25 or 37.5 ohms to attain standard RS-343-
A video levels. Any deviation from this impedance will
affect the resulting video output levels proportionally. As
with the data interface, it is important that the analog
transmission lines have matched impedance throughout,
including connectors and transitions between printed
wiring and coaxial cable. The combination of matched
source termination resistor R
S
and load terminator R
L
minimizes reflections of both forward and reverse travel-
ing waves in the analog transmission system. The return
path for analog output current is V
CC
, which is connected
to the source termination resistor R
S
.
POWER CONSIDERATIONS
The SPT5140 operates from a single –5.2 V standard
supply. Proper bypassing of the supplies will augment the
SPT5140’s inherent supply noise rejection characteris-
tics. As shown in figure 2, each supply pin should be by-
passed as close to the device as possible with 0.01
µF
and 10
µF
capacitors.
The SPT5140 has two analog (V
EE
) power supply pins.
Both supply pins should be properly bypassed as men-
tioned previously. This device also has two analog (V
CC
)
ground pins. Both ground pins should be tied to the
analog ground plane. Power and ground pins must be
connected in all applications. If a +5 V power source is
required, the ground pins (V
CC
) become the positive sup-
ply pins while the supply pins (V
EE
) become the ground
pins. The relative polarities of the other input and output
voltages must be maintained.
SPT5140
5
3/28/00
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
