PRELIMINARY Data Sheet
Electrical Characteristics - CDK8307C Continued
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Power dissipation with all chs in sleep mode
Power dissipation savings per channel off
80
28
mW
mW
Sleep Channel Mode Dissipation
Sleep Channel Mode Savings
Clock Inputs
50
MSPS
MSPS
Maximum Conversion Rate
Minimum Conversion Rate
20
Electrical Characteristics - CDK8307D
(AVDD = 1.8V, DVDD = 1.8V, OVDD = 1.8V, 65MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal, 14-bit output, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Performance
SNR
Signal to Noise Ratio
FIN = 8MHz
FIN = 8MHz
FIN = 8MHz
FIN = 8MHz
FIN = 8MHz
72.2
71.5
82
dBFS
dBFS
dBc
SINAD
SFDR
Signal to Noise and Distortion Ratio
Spurious Free Dynamic Range
Second order Harmonic Distortion
Third order Harmonic Distortion
Effective number of Bits
HD2
95
dBc
HD3
82
dBc
ENOB
11.6
bits
Signal applied to 7 chs (FIN0). Measurement
Crosstalk
taken on one ch, full scale at FIN1. FIN1
8MHz, FIN0 = 9.9MHz
=
95
dBc
Power Supply
145
67
mA
mA
Analog supply current
Digital and output driver supply
Digital supply current
261
121
382
10
mW
mW
mW
μW
Analog power Dissipation
Digital power Dissipation
Total power Dissipation
Power Down Dissipation
Sleep Mode Dissipation
Sleep Channel Mode Dissipation
Sleep Channel Mode Savings
96
mW
mW
mW
Power dissipation with all chs in sleep mode
Power dissipation savings per channel off
98
38
Clock Inputs
65
MSPS
MSPS
Maximum Conversion Rate
Minimum Conversion Rate
20
©2009 CADEKA Microcircuits LLC
www.cadeka.com
12
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